摘要:
A high power amplifier has a first balun propagating a half of an input signal to an in-phase output terminal, and also propagating a fourth of the input signal to first and second opposite-phase output terminals, the signal propagated to the first and second opposite-phase output terminals lagging 180 degrees behind the signal propagated to the in-phase output terminal; first and second power amplifier circuits connected to the first and second opposite-phase output terminals of the first balun and having the same characteristics; a third power amplifier circuit connected to the in-phase output terminal of the first balun and having output power substantially twice as much as the output power of the first or second power amplifier circuit; and a second balun having first and second opposite-phase input terminals for receiving the outputs of the first and second power amplifier circuits, having an in-phase input terminal for receiving the output of the third power amplifier circuit, combining the outputs of the first, second and third power amplifier circuits, and propagating combined output.
摘要:
To reduce the size of a multi-carrier transmitter circuit for a mobile communication base station, by suppressing instantaneous peak output power to a small value with respect to a wide-band signal of a few MHz to tens of MHz so that the peak factor of a multi-carrier signal is reduced. In a multi-carrier transmitter circuit for modulating carriers with corresponding input signals to generate modulated signals and then multiplexing said modulated signals and outputting a multiplexed signal, the multi-carrier transmitter circuit is equipped with carrier generators 3-1 to 3-n for generating each said carrier, modulators 5-1 to 5-n for modulating each carrier with each input signal and outputting said modulated signal, an adder 6 for multiplexing said modulated signals and outputting the multiplexed signal, variable attenuators 2-1 to 2-n for directly or indirectly adjusting a level of each input signal, phase detectors 4-1 to 4-n for detecting a phase of each carrier, and a control circuit 7 for controlling the variable attenuators 2-1 to 2-n in accordance with the phase of each carrier.
摘要:
A power amplifier has an input terminal; an output terminal; an N number of bypassable amplification circuits which are connected directly or indirectly in a sequential manner between the input terminal and the output terminal; an impedance conversion circuit which is connected directly or indirectly between the amplification circuit of a final stage and the output terminal; and a bias control circuit which controls the amplification circuits, each of the amplification circuits is configured by a high-frequency switch circuit, and an amplifier which is connected directly or indirectly to the switch circuit, and the bias control circuit controls power source voltages of the amplifiers and controls status of the switch circuit.
摘要:
A feedforward amplifier includes a power divider for dividing the input signal into first and second signals. The first signal is processed in a first path that includes, in sequence, a first vector adjuster, a main amplifier, a directional coupler and a delay circuit. The second signal is delayed in a second path that includes, in sequence, another delay circuit, a first power combiner and an auxiliary amplifier block. The first power combiner combines the first signal, by way of a coupling port from the directional coupler, with the second signal to provide a combined signal into the auxiliary amplifier block. The auxiliary amplifier block further divides the second signal into two divided signals, each having a respective non-overlapping frequency band. The two divided signals are respectively vector adjusted, amplified, and then recombined. The recombined signal is then recombined with the processed signal in the first path to provide the desired output signal.
摘要:
A multi-mode wireless system having a modulator (11) for modulating two system signals (low frequency signals for the GSM system and high frequency signals for the DCS1800 system), a first local oscillator (14) for oscillating a signal of a predetermined frequency, a n-divider (15) for dividing a signal from the first local oscillator by a factor of n, a high frequency mixer (13) for converting a signal to a high frequency side output (17) according to a signal output from the first local oscillator (14) and a signal output from the modulator (11), and a low frequency mixer (12) for outputting a signal to a low frequency mixer (16) according to an n-divided signal and a signal from the modulator (11).
摘要:
In the receiver using a PLL synthesizer, there is a limit in reducing boot-up time or frequency switching time, which shortens battery life. A first local frequency L01 from a multiplier 22 and a receiving signal are input to a first frequency converter 10 to convert it to a first intermediate frequency IF1. The first intermediate frequency IF1 is converted in a second frequency converter 12 by a frequency L02 of an N1 frequency divider 24 to a second intermediate frequency IF2. Also, the outputs of the N1 frequency divider 24 and N2 frequency divider 26 are mixed in the frequency converter for transmission 34, and L04 and the local frequency L01 are added to a lower-side-band cancel mixer 50 to extract the upper side band of the transmission frequency. With the configuration in which a frequency may be varied by one channel interval by varying the frequency division number of the N1 frequency divider 24 by one, switching of frequency division number permits channel switching for both transmission and reception.
摘要:
A high power amplifier has a first balun propagating a half of an input signal to an in-phase output terminal, and also propagating a fourth of the input signal to first and second opposite-phase output terminals, the signal propagated to the first and second opposite-phase output terminals lagging 180 degrees behind the signal propagated to the in-phase output terminal; first and second power amplifier circuits connected to the first and second opposite-phase output terminals of the first balun and having the same characteristics; a third power amplifier circuit connected to the in-phase output terminal of the first balun and having output power substantially twice as much as the output power of the first or second power amplifier circuit; and a second balun having first and second opposite-phase input terminals for receiving the outputs of the first and second power amplifier circuits, having an in-phase input terminal for receiving the output of the third power amplifier circuit, combining the outputs of the first, second and third power amplifier circuits, and propagating combined output.
摘要:
A method and apparatus for controlling a feedforward amplifier, wherein a superior distortion compensation characteristic is maintained over a wide frequency range, with the influence due to temperature variation and weathering minimized. A pilot signal generated by a pilot signal generator circuit is injected into the output of the main amplifier of a feedforward amplifier, and then the signal is sampled at the output of a first circuit and a second circuit, which is then low-range converted by a frequency converter and demodulated into I and Q components by a quadrature demodulator, and amplified and shaped into a pilot monitor signal; and a control circuit controls the vector adjusters within the distortion suppression circuit of the first and the second circuits using the I and Q signal components as the error signal so that as the amplitude level of pilot monitor signal is mininized the control value is maintained.
摘要:
A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.
摘要:
A balun design incorporating the functions of a splitter (combiner) which can be employed in a high power amplifier circuit configuration. The balun is formed of a dielectric multilayer board with conductor patterns on each conductor pattern layer. The balun includes the propagation of a half of an input signal to an in-phase output terminal, and also propagating a fourth of the input signal to first and second opposite-phase output terminals, the signal propagated to the first and second opposite-phase output terminals lagging 180 degrees behind the signal propagated to the in-phase output terminal. The balun provides the output signals at the first and second opposite-phase output terminals 180° out of phase employing through holes in the main line and coupling lines for promoting electromagnetic coupling therebetween.