Abstract:
The present invention provides a liquid crystal panel that can provide a neutral display that is free from coloring in every direction. The liquid crystal panel includes a first polarizer 14a, a second polarizer 14b, and a liquid crystal cell 13. The first polarizer 14a is arranged on the visible side of the liquid crystal cell 13 and the second polarizer 14b is arranged on the backlight side of the liquid crystal cell 13. The liquid crystal panel further includes a first retardation layer 11 and a second retardation layer 12. A refractive index ellipsoid of the first retardation layer 11 has a relationship of nx=ny>nz, and a refractive index ellipsoid of the second retardation layer 12 has a relationship of nx>ny≧nz. The first retardation layer 11 and the second retardation layer 12 are arranged between the liquid crystal cell 13 and the second polarizer 14b.
Abstract:
Disclosed is the prevention of the occurrence of uneven image density, as well as the image degradation caused by inhibiting the continuity of image density, produced by the photoreceptor in which uneven electrification exists, and additionally uneven sensitivity coexists, without enlargement of the apparatus as well as increase in the cost. To the exposure amount obtained by the approximate linear transformation of the pixel gradation in each segment multi-divided in the surface of the photoreceptor drum 1, in all the pixel gradation including 0 level, exposing source 2 is controlled to expose with the amount of exposure, offset with only the offset exposure amount Ea which corresponds to the difference between the initial electric potential and the reference initial electric potential V0 of the segment. The exposure amount adjustment of the offset exposure amount Ea is conducted by offsetting the exposure time in each pixel.
Abstract:
An adaptive equalizer circuit includes an equalizer circuit configured to produce an output data signal in response to an equalizing factor, a data detecting circuit configured to detect a signal level of the output data signal in a given unit time at predetermined timing, a boundary detecting circuit configured to detect a signal level of the output data signal at a timing that is ½ unit time away from the predetermined timing, and a control unit configured to detect, multiple times, a pattern having consecutive data items of a first value followed by a data item of a second value, and to adjust the equalizing factor such that a data detection value and a boundary detection value obtained for the data item of the second value are equal to each other a certain percentage of times, and are different from each other substantially the same percentage of times.
Abstract:
An electric driver includes a hook portion which is constituted by a hook-like portion and a connecting portion for connecting the hook-like portion to the handle. The hook-like portion is constituted by a base portion connected to the connecting portion and a bent portion continuous to the base portion and a front end portion continuous to the bent portion and arranged at a position substantially opposed to the base portion and can be deformed. The front end portion and the base portion can be proximate to and remote from each other. The connecting portion holds the hook-like portion in a state of being hung down in a direction substantially the same as a direction of extending the handle. The hook-like portion is held centering on a first rotating axis center extended in the direction of hanging down the hook-like portion pivotably relative to the handle.
Abstract:
The invention provides a process for fabricating a solid electrolytic capacitor of the chip type which process includes the steps of plating a fabrication frame comprising an anode terminal member and a cathode terminal member projecting from a pair of side frame members respectively so as to be opposed to each other, the anode terminal member being stepped so as to provide a lower portion toward the cathode terminal member, a hole extending vertically and being formed in each of the anode terminal member and a higher portion of the cathode terminal member, joining an anode lead of a capacitor element to an upper surface of the cathode terminal member and a bottom surface of the capacitor element to an upper surface of the lower portion of the cathode terminal member, forming a packaging resin portion around the capacitor element without permitting resin to ingress into the holes, and cutting the anode and cathode terminal members along vertical planes extending through the respective holes.
Abstract:
An anode terminal or a cathode terminal is provided with an exposure portion that extends substantially perpendicularly to an arrangement direction of the two terminals and that have an end face exposed on a side face of a housing. At least the end face on the exposure portion is plated for improving the solder wettability. Furthermore, a front end portion of the exposure portion is bent upwards along a peripheral face of the housing.
Abstract:
An anode terminal or a cathode terminal is provided with an exposure portion that extends substantially perpendicularly to an arrangement direction of the two terminals and that have an end face exposed on a side face of a housing. At least the end face on the exposure portion is plated for improving the solder wettability. Furthermore, a front end portion of the exposure portion is bent upwards along a peripheral face of the housing.
Abstract:
The invention provides a process for fabricating a solid electrolytic capacitor of the chip type which process includes the steps of plating a fabrication frame comprising an anode terminal member and a cathode terminal member projecting from a pair of side frame members respectively so as to be opposed to each other, the anode terminal member being stepped so as to provide a lower portion toward the cathode terminal member, a hole extending vertically and being formed in each of the anode terminal member and a higher portion of the cathode terminal member, joining an anode lead of a capacitor element to an upper surface of the cathode terminal member and a bottom surface of the capacitor element to an upper surface of the lower portion of the cathode terminal member, forming a packaging resin portion around the capacitor element without permitting resin to ingress into the holes, and cutting the anode and cathode terminal members along vertical planes extending through the respective holes.
Abstract:
A semiconductor integrated circuit device has a first MIS transistor of a first conductivity type, a second MIS transistor of a second conductivity type, a resistor connected in series between a first power-source line and a second power-source line, and a third MIS transistor of the first conductivity type. The third MIS transistor has a gate connected to a node where the first MIS transistor and the second MIS transistor are connected together, and a drain connected to a connection node where the second MIS transistor and the resistor are connected together.
Abstract:
An image-forming machine which forms an image on a photosensitive material drum which passes through the steps of electric charging, exposure to light, developing and transfer. A pair of side walls are disposed opposite to each other, spaced at a distance. Inner wheels of bearings have an inner wheel and an outer wheel. The inner wheels are secured to the outer peripheral surfaces of the photosensitive material drum at both ends thereof, and outer wheels of the bearings are secured to the corresponding side walls, so that the photosensitive material drum is rotatably supported by the side walls.