摘要:
A method of channel processing is provided wherein multiple reduced-bandwidth “processing blocks” may be combined at RF to allow for the continuous and flexible placement of multiple-channels across the full or partial CATV output band. Each reduced-bandwidth processing block is associated with a fixed-frequency upconversion. In order to allow for continuous agile channel placement, the processing blocks overlap one another in frequency at RF. In the case where it is not necessary that the full CATV band be available to the combined output, the number of required processing blocks and upconversion paths is reduced and individual processing blocks and upconversion paths may be used to cover multiple non-contiguous frequency bands.
摘要:
A method to improve the frequency resolution and phase noise of a synthesized RF signal results in superior instantaneous frequency change and phase modulation capability, wide frequency set ability, and suitability for implementation in a digital ASIC. The RF signal synthesis is achieved from a higher reference frequency clock signal using a variable pulse stretching technique. The amount of the pulse stretch in each cycle is set by a phase increment value and is implemented using programmable delay lines. Pulse stretching can be extended beyond one cycle by pulse swallowing, allowing the generation of an RF signal with frequencies from DC up to the input reference frequency. Phase modulation is incorporated by digital control of the phase stretching with the phase modulation bits.
摘要:
The present invention provides a means to implement amplitude and phase modulation digitally and directly at an RF frequency that benefits from high output power without the use of amplifiers. This is accomplished by the combination of two varying amplitude and phase vectors. A reference oscillator produces a carrier signal, which is supplied to two digital delay lines composed of a sequence of delay banks. The delay lines are controlled by lookup tables that are updated by the vector control circuit, used to determine the delay of each digital delay line. The output of each delay line is multiplexed to a switching bank which is also controlled by the vector control circuit. The output of the switching bank, in combination with a summer, is used to produce discrete amplitude adjustment of the vector. The delay of the lines and the summation adjustment are set in such a way as to produce two vectors with the desired phase shift and magnitude the summation of these two vectors produces a resultant vector with the desired phase and amplitude characteristics.
摘要:
A receiver for tracking a carrier suppressed phase-shifted input signal comprises a phase-locked loop circuit for receiving the input signal and having a variable frequency oscillator responsive to a control signal for oscillating at a frequency corresponding to an intermediate frequency and a frequency difference detector for producing an output signal indicative of the frequency difference between the frequency of the input signal and the intermediate frequency, a feedback loop network having a narrow-band path and a wide-band path and being responsive to the detector output signal for producing the control signal and applying the control signal to the oscillator through one of the paths whereby to change the intermediate frequency of the oscillator in response to the control signal, a quality detector responsive to the detector output signal for producing a signal corresponding to the bit error rate of the input signal; and selection means responsive to the bit error rate signal for causing the control signal to pass through the narrow-band path when the bit error rate signal is below a predetermined threshold and through the wide-band path when the bit error rate signal exceeds the predetermined threshold.
摘要:
The present invention provides a method to improve the frequency resolution and phase noise of a synthesized RF signal. It also results in the superior characteristics of instantaneous frequency changeability, wide frequency setting ability, and fully digital ASIC implementation ability. The synthesized RF signal is generated from a higher reference frequency using a variable pulse stretching technique. The amount of the pulse stretch in each cycle is controlled by a phase increment value and is implemented using programmable delay lines. Pulse stretching is extended beyond one cycle by pulse swallowing, allowing the generation of an RF signal from DC up to the input reference clock signal frequency.
摘要:
A method to improve the frequency resolution and phase noise of a synthesized RF signal results in superior instantaneous frequency change and phase modulation capability, wide frequency set ability, and suitability for implementation in a digital ASIC. The RF signal synthesis is achieved from a higher reference frequency clock signal using a variable pulse stretching technique. The amount of the pulse stretch in each cycle is set by a phase increment value and is implemented using programmable delay lines. Pulse stretching can be extended beyond one cycle by pulse swallowing, allowing the generation of an RF signal with frequencies from DC up to the input reference frequency. Phase modulation is incorporated by digital control of the phase stretching with the phase modulation bits.
摘要:
A distortion-cancellation method for analog CATV or QAM transmission over cable is provided wherein a single feedback path from the output of a multiple-channel multiple-port upconverter/modulator is down-converted and used to reduce or cancel undesirable noise components including LO leakage, spurious, and modulated noise. The method allows for real-time monitoring, tuning, or control of the CATV/QAM output and of interfering signals and aging effects as compared to a desired performance metric.
摘要:
The present invention provides a means to implement amplitude and phase modulation digitally and directly at an RF frequency that benefits from high output power using non-linear amplifiers. This is accomplished by the combination of two constant amplitude phase varying vectors. A reference oscillator produces a carrier signal, which is supplied to two digital delay lines composed of a sequence of delay banks. The delay lines are controlled by lookup tables that are updated by the vector control circuit used to determine the delay of each digital delay line. The delay of the lines are set in such a way as to produce two vectors with the desired phase shift that, when summed together, produce a vector with the desired phase and amplitude characteristics.
摘要:
The present invention provides a means to implement amplitude and phase modulation digitally and directly at an RF frequency that benefits from high output power without the use of amplifiers. This is accomplished by the combination of two varying amplitude and phase vectors. A reference oscillator produces a carrier signal, which is supplied to two digital delay lines composed of a sequence of delay banks. The delay lines are controlled by lookup tables that are updated by the vector control circuit, used to determine the delay of each digital delay line. The output of each delay line is multiplexed to a switching bank which is also controlled by the vector control circuit. The output of the switching bank, in combination with a summer, is used to produce discrete amplitude adjustment of the vector. The delay of the lines and the summation adjustment are set in such a way as to produce two vectors with the desired phase shift and magnitude the summation of these two vectors produces a resultant vector with the desired phase and amplitude characteristics.
摘要:
The present invention provides a method to improve the frequency resolution and phase noise of a synthesized RF signal. It also results in the superior characteristics of instantaneous frequency changeability, wide frequency setting ability, and fully digital ASIC implementation ability. The synthesized RF signal is generated from a higher reference frequency using a variable pulse stretching technique. The amount of the pulse stretch in each cycle is controlled by a phase increment value and is implemented using programmable delay lines. Pulse stretching is extended beyond one cycle by pulse swallowing, allowing the generation of an RF signal from DC up to the input reference clock signal frequency.