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公开(公告)号：US06441632B1
公开(公告)日：2002-08-27
申请号：US09681450
申请日：2001-04-09
IPC分类号： G01R3102
CPC分类号： G01R1/0483
摘要： A spring probe (pogo pin) contactor for testing semiconductor devices with pogo pins within a spring probe contactor is disclosed. The contactor device has a plurality of pogo pins extending therefrom for testing the semiconductor device. A surface of the spring pogo pin contactor has an array of apertures for receiving each pogo pin for contacting of the plurality of contacts on the device under test in order to make contact with and compress the pogo pins. A three piece assembly is used to accurately position the pogo pins for ease of construction and repair.
摘要翻译： 公开了一种用于在弹簧探针接触器内测试具有弹簧销的半导体器件的弹簧探针（弹簧针）接触器。 接触器装置具有从其延伸的多个弹簧针，用于测试半导体器件。 弹簧弹簧针接触器的表面具有用于接收每个弹簧销的孔阵列，用于接触待测器件上的多个触点，以便与弹簧销接触并压缩弹簧销。 使用三件式组件来精确定位弹簧销，以方便施工和维修。
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公开(公告)号：US5118027A
公开(公告)日：1992-06-02
申请号：US690731
申请日：1991-04-24
CPC分类号： H01L21/67138 , B23K1/20 , H01L21/4853 , H05K3/3478 , B23K2201/40 , H01L2224/11003 , H01L2224/11334 , H01L2924/01322 , H05K2201/035 , H05K2201/10734 , H05K2203/0113 , H05K2203/0195 , H05K2203/0338 , H05K2203/041 , H05K2203/043 , H05K2203/082 , H05K3/3484
摘要： A process for fabricating a plurality of solder joints from a low melting point solder paste and high melting point solder balls is described. An abbreviated process flow is as follows: First, the solder balls are placed into cavities in an alignment boat, a vacuum is initiated to hold the boat and solder balls in place. Second, an amount of solder paste is applied directly onto the solder balls in the boat. Third, an alignment plate is placed over the alignment boat to provide a means of roughly aligning the solder ball/solder paste combination to the substrate. Fourth, the substrate is placed through the alignment plate on top of the solder balls in the boat. Pressure is applied to wet the solder paste to the conductive pads on the substrate. Finally, the substrate and alignment boat assembly is processed through a furnace for solder paste reflow. No expensive alignment tools are necessary as the substrate can at least partially realign itself to the array of solder balls during reflow because of the surface tension exerted by the molten solder paste as it wets the entirety of each conductive pad on the substrate.
摘要翻译： 描述了从低熔点焊膏和高熔点焊球制造多个焊点的工艺。 缩短的工艺流程如下：首先，将焊球放置在对准船的空腔中，开始真空以将船和焊球保持在适当位置。 第二，将一定量的焊膏直接施加到船上的焊球上。 第三，将对准板放置在对准船上方，以提供将焊球/焊膏组合大致对准到基板的装置。 第四，基板通过对准板放置在船中的焊球上。 施加压力以将焊膏润湿到衬底上的导电焊盘。 最后，通过用于焊膏回流的炉子处理衬底和对准舟组件。 不需要昂贵的对准工具，因为衬底可以在回流期间至少部分地将其自身重新排列到焊球阵列，因为当熔融焊膏浸润衬底上的每个导电焊盘的整体时施加的表面张力。
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公开(公告)号：US06213376B1
公开(公告)日：2001-04-10
申请号：US09098828
申请日：1998-06-17
IPC分类号： B23K3704
CPC分类号： H01L21/6835 , B23K37/0408 , B23K2101/40 , H01L25/50 , H01L2221/68313 , H01L2224/05568 , H01L2224/05573 , H01L2224/056 , H01L2224/16 , H01L2924/30105 , Y10T29/53978 , H01L2924/00014
摘要： An apparatus used for holding a first semiconductor device in proper alignment to a second semiconductor device, whose size is different from the first device, while performing a C4 bond between the two devices. The apparatus for holding the two devices in proper alignment consists of a holding fixture, which includes upper and lower pocket receptacles for receiving the semiconductor devices. The semiconductor devices are placed into the respective upper and lower slots aligned to two or more edges of the holding fixture.
摘要翻译： 一种用于在与两个装置之间执行C4键的同时保持尺寸与第一装置不同的第二半导体装置正确对准的装置。 用于将两个装置保持正确对准的装置包括保持夹具，其包括用于接收半导体装置的上部和下部口袋容器。 将半导体器件放置在与保持夹具的两个或更多个边缘对准的相应的上部和下部狭缝中。
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公开(公告)号：US06279815B1
公开(公告)日：2001-08-28
申请号：US09621561
申请日：2000-07-21
IPC分类号： B23K3102
CPC分类号： H01L21/6835 , B23K37/0408 , B23K2101/40 , H01L25/50 , H01L2221/68313 , H01L2224/05568 , H01L2224/05573 , H01L2224/056 , H01L2224/16 , H01L2924/30105 , Y10T29/53978 , H01L2924/00014
摘要： The present invention provides an apparatus and methods for holding a first semiconductor device in proper alignment to a second semiconductor device, whose size is different from the first device, while performing a C4 bond between the two devices. The apparatus for holding the two devices in proper alignment consists of a holding fixture, which includes upper and lower pocket receptacles for receiving the semiconductor devices. The semiconductor devices are placed into the respective upper and lower slots aligned to two or more edges of the holding fixture.
摘要翻译： 本发明提供一种用于在与两个装置之间执行C4键的同时保持第一半导体器件与第一半导体器件的尺寸不同的第二半导体器件的正确对准的装置和方法。 用于将两个装置保持正确对准的装置包括保持夹具，其包括用于接收半导体装置的上部和下部口袋容器。 将半导体器件放置在与保持夹具的两个或更多个边缘对准的相应的上部和下部狭缝中。
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公开(公告)号：US5528159A
公开(公告)日：1996-06-18
申请号：US454458
申请日：1995-05-30
申请人： Richard G. Charlton , George C. Correia , Mark A. Couture , Gary R. Hill , Kibby B. Horsford , Anthony P. Ingraham , Michael D. Lowell , Voya R. Markovich , Gordon C. Osborne, Jr. , Mark V. Pierson
发明人： Richard G. Charlton , George C. Correia , Mark A. Couture , Gary R. Hill , Kibby B. Horsford , Anthony P. Ingraham , Michael D. Lowell , Voya R. Markovich , Gordon C. Osborne, Jr. , Mark V. Pierson
CPC分类号： G01R31/2863 , G01R1/0483 , G01R1/07307 , G01R31/2886
摘要： A method and apparatus for testing semi-conductor chips is disclosed. The individual semiconductor chips have I/O contacts. The apparatus is provided with an interposer that has contacts corresponding to the contacts on the semiconductor chip. Both the chip and the interposer contacts can be any known type including metal ball, bumps, or tabs or may be provided with dendritic surfaces. The chip contacts are first brought into relative loose temporary contact with the contacts on the interposer and then a compressive force greater that 5 grams per chip contact is applied to the chip to force the chip contacts into good electrical contact with the interposer contacts. Testing of the chip is then performed. The tests may include heating of the chip as well as the application of signals to the chip contacts. After testing the chip is removed from the substrate.
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公开(公告)号：US6137299A
公开(公告)日：2000-10-24
申请号：US884276
申请日：1997-06-27
CPC分类号： G01R1/06794 , G01R3/00 , G01R31/2886 , G01R1/07314
摘要： Formation of a contact probe having a pattern of dendritic textured contacts complementary to that of a contact pad array on a bare chip allows formation of simultaneous temporary connections to all contact pads of the bare chip at a much reduced compressional force across the chip. The reliability of such connections at such a reduced force allows screening, burn-in and full functional testing of the bare chip at a high throughput by an automated apparatus to exploit potential economies of "known good die" (KGD) processing for limiting or avoiding repair, rework and further processing of less than fully functional chips for complex electronic packages. The compressional force is sensed by a pressure sensor, the output of which controls the advancement of the bare chip toward the contact probe such that the dendritic textured contacts of the contact probe penetrate the contact pads of the bare chip.
摘要翻译： 形成具有与裸芯片上的接触焊盘阵列互补的树状纹理触点图案的接触探针允许以跨越芯片的大大降低的压缩力同时临时连接到裸芯片的所有接触焊盘。 以这种减小的力量的这种连接的可靠性允许通过自动化设备在高吞吐量下对裸芯片进行屏蔽，老化和全功能测试，以利用潜在的“已知好的裸片”（KGD）处理的限制或避免 修复，返修和进一步处理复杂电子封装的功能不足的芯片。 压力由压力传感器检测，压力传感器的输出控制裸芯片朝向接触探针的前进，使得接触探针的树突纹理触点穿透裸芯片的接触焊盘。
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