Abstract:
A ferroelectric recording medium and a writing method for the same are provided. The ferroelectric recording medium includes a ferroelectric layer which reverses its polarization when receiving a predetermined coercive voltage. A nonvolatile anisotrophic conduction layer is formed on the ferroelectric layer. A resistance of the anisotrophic conduction layer decreases when receiving a first voltage lower than the coercive voltage, and the resistance of the anisotrophic conduction layer increases when receiving a second voltage higher than the coercive voltage. Multi-bit information is stored by a combination of polarization states of the ferroelectric layer and the resistance of the anisotrophic conduction layer. Accordingly, multiple bits can be expressed on one domain of the ferroelectric recording medium.
Abstract:
A method of data recording and reading for a memory device employing magnetic domain wall movement. The memory device includes a writing track, an interconnecting layer formed on the writing track, and a recording track formed on the interconnecting layer
Abstract:
A perpendicular magnetic recording head which moves in a track direction of a recording layer of a perpendicular magnetic recording medium to write information on the recording layer or read information from the recording layer. The perpendicular magnetic recording head includes: the perpendicular magnetic recording medium including a soft magnetic underlayer and the recording layer; a write head including a main pole that applies a magnetic field to, and writes information to, the recording layer and a return pole having a first end which is connected to the main pole and having a second end which is spaced apart from the main pole over an air bearing surface (ABS) of the perpendicular magnetic recording head which is adjacent to the recording layer; and a permanent magnet formed on at least one side of the write head.
Abstract:
Provided is a memory device employing magnetic domain wall movement. The memory device includes a first track, an interconnecting layer, and a second track. The first track including a magnetic material is formed in a first direction. The interconnecting layer is formed on the first track. The second track including a magnetic material is formed in a second direction on the interconnecting layer.
Abstract:
Provided is a magnetic memory device that uses a current induced switching (CID) method. The magnetic memory device that uses a CID method includes a lower electrode, a magnetic resistance structure that is formed on the lower electrode which comprises a free layer whose widths of two sides are varied, and an upper electrode formed on the magnetic resistance structure.
Abstract:
A flash memory test system capable of test time reduction and an electrical test method using the same: The invention provides a parallel tester that includes a first memory and a second memory. The first and second memories are used to each supply different data to identical addresses within a plurality of DUTs, thereby making it possible to conduct in parallel tests such as trim tests, repair tests, and invalid block masking test. Thus parallel testing is done to replace testing that was previously done serially.
Abstract:
A magnetic memory device includes a magnetic tunneling junction (MTJ) structure having a cylindrical shape. Elements of the MTJ structure are co-axial. The MTJ structure includes a conductive layer, an insulating layer co-axially formed around the conductive layer and a material layer formed around the insulating layer, the material layer being co-axial with the conductive layer and having a plurality of magnetic layers. The material layer includes a lower magnetic layer, a tunneling layer, and an upper magnetic layer that are sequentially stacked around and along the conductive layer.
Abstract:
A method for testing a plurality of semiconductor apparatuses, the method including mounting a plurality of semiconductor apparatuses on a first test board, wherein the plurality of semiconductor apparatuses include test circuits, loading test software into the test circuits, performing, by using the test circuits, self-tests on the plurality of semiconductor apparatuses based on the test software, and removing the plurality of semiconductor apparatuses, which have completed the self-tests, from the first test board. Upon completion of the loading of the test software, the test software is loaded into test circuits of a plurality of semiconductor apparatuses on a second test board, while the self-tests are performed on the plurality of semiconductor apparatuses on the first test board.
Abstract:
A pedal force adjusting apparatus for an accelerator pedal regulates a resilient force of a resilient member through movement of an upper carrier and a lower carrier due to rotation of a lead screw. Accordingly, a pedal force of a pedal arm can be easily regulated if necessary.
Abstract:
Provided are a perpendicular magnetic recording head and a method of manufacturing the same. The perpendicular magnetic recording head includes a main pole including a pole tip applying a recording magnetic field to a recording medium, a coil surrounding the main pole in a solenoid shape such that recording magnetic field for recording information to a recording medium is generated at the pole tip, and a return yoke forming a magnetic path for the recording magnetic field together with the main pole and surrounding a portion of the coil passing above the main pole. The number of times that the coil passes above the main pole is smaller than the number of times that the coil passes below the main pole.