HALF WIDTH COUNTING LEADING ZERO CIRCUIT USING COMPARATORS
    1.
    发明申请
    HALF WIDTH COUNTING LEADING ZERO CIRCUIT USING COMPARATORS 有权
    使用比较器的半宽度计数引线零电路

    公开(公告)号:US20130332788A1

    公开(公告)日:2013-12-12

    申请号:US13489551

    申请日:2012-06-06

    申请人: Deepak K. Singh

    发明人: Deepak K. Singh

    IPC分类号: H03M13/03 G06F11/10

    CPC分类号: G06F7/74

    摘要: A circuit and method are provided for providing a value representing the number of leading zero bits in an input data word. The input data word contains random data. The input data word is logically divided into odd and even bit positions. The circuit includes a first comparator circuit comparing data in the odd bit positions to data in the even bit positions. The circuit further includes a second comparator circuit comparing the data in the odd bit positions to a result of a logical operation performed on the data in the odd and even bit positions. The circuit further includes a half-width leading zero counting circuit that provides the value representing the number of leading zero bits in the input data word. The comparator circuits provide a correction bit value concatenated to the value.

    摘要翻译: 提供一种用于提供表示输入数据字中的前导零比特数的值的电路和方法。 输入数据字包含随机数据。 输入数据字在逻辑上分为奇数位和偶位位。 电路包括将奇数位位置中的数据与偶数位位置中的数据进行比较的第一比较器电路。 电路还包括第二比较器电路,将奇数位位置中的数据与对奇数位和偶位位数据执行的逻辑运算结果进行比较。 该电路还包括一个半宽度的前置零计数电路,其提供表示输入数据字中的前导零比特数的值。 比较器电路提供连接到该值的校正位值。

    Expanded Scope Incrementer
    2.
    发明申请
    Expanded Scope Incrementer 有权
    扩展范围递增器

    公开(公告)号:US20130290393A1

    公开(公告)日:2013-10-31

    申请号:US13926918

    申请日:2013-06-25

    申请人: Deepak K. Singh

    发明人: Deepak K. Singh

    IPC分类号: G06F7/505

    CPC分类号: G06F7/5055

    摘要: An incrementor circuit and method for incrementing is provided that computes an output data word by increasing an input data word magnitude by one of several integer values. The incrementor circuit includes a mode increment signal circuit providing a designation of one of the integer values for increasing the input data word magnitude. A single constant incrementor is connected to the mode increment signal circuit and the input data word and provides an intermediate sum by selectively adding a constant to the input data word. A multiplex circuit logically combines selected input data word bit position values with the mode increment signal circuit designation forming logical bit position values and directs selected input data word bit position values, selected logical bit position values, and selected bit position values of the intermediate sum to form the output data word.

    摘要翻译: 提供了一种用于递增的递增器电路和方法,其通过将输入数据字幅度增加到几个整数值之一来计算输出数据字。 增量器电路包括模式增量信号电路,其提供用于增加输入数据字幅度的整数值之一的指定。 单个常数增量器连接到模式增量信号电路和输入数据字,并通过选择性地向输入数据字添加常数来提供中间和。 多路复用电路将所选择的输入数据字位位置值与形成逻辑位位置值的模式增量信号电路指定逻辑组合,并将所选择的输入数据字位位置值,所选择的逻辑位位置值和中间和的选定位位置值引导到 形成输出数据字。

    Temperature dependent voltage source compensation
    3.
    发明授权
    Temperature dependent voltage source compensation 有权
    温度依赖电压源补偿

    公开(公告)号:US08022685B2

    公开(公告)日:2011-09-20

    申请号:US11671568

    申请日:2007-02-06

    IPC分类号: G05F1/56 G05F1/565 G05F1/567

    CPC分类号: G06F1/26 Y10S323/907

    摘要: A circuit and a method for regulating a voltage supply where the method includes the steps of concurrently measuring temperature, IR drop and frequency response within the circuit, adjusting voltage supplied to the circuit in response to the measured temperature, IR drop and frequency response, and determining a correction value based on the variance of the measured frequency response from an expected frequency response and providing a correction for subsequent predetermined frequency response values. The frequency response measurement is dependent upon the constant bandgap voltage source which may very according to temperature. Upon a determination that corrections may be required for the bandgap voltage source to compensate for temperature variations, the measurement process which uses the bandgap voltage source can be altered to compensate for the temperature variations.

    摘要翻译: 一种用于调节电压源的电路和方法,其中该方法包括同时测量电路内的温度,IR降低和频率响应的步骤,响应于测量的温度,IR降低和频率响应调整提供给电路的电压,以及 基于来自预期频率响应的所测量的频率响应的方差来确定校正值,并为随后的预定频率响应值提供校正。 频率响应测量取决于可能非常根据温度的恒定带隙电压源。 在确定带隙电压源可能需要校正以补偿温度变化的情况下,可以改变使用带隙电压源的测量过程以补偿温度变化。

    Digital adaptive voltage supply
    4.
    发明授权
    Digital adaptive voltage supply 失效
    数字自适应电源

    公开(公告)号:US07714635B2

    公开(公告)日:2010-05-11

    申请号:US11671531

    申请日:2007-02-06

    IPC分类号: G05F1/10

    CPC分类号: H03K19/00384

    摘要: Measurement circuit components are included in an integrated circuit fabricated on a semiconductor substrate. These measurement circuits include registers that are connected to a voltage regulation circuit that provides the integrated circuit voltage source and to a power management circuit. These measurement circuits provide signals to control the voltage regulation circuit for adjusting the voltage output to the integrated circuit based upon a measurement values obtained on the semiconductor device. These measurements include temperature, IR drop at locations on the semiconductor substrate, along with the frequency response of integrated circuit.

    摘要翻译: 测量电路元件包括在制造在半导体衬底上的集成电路中。 这些测量电路包括连接到提供集成电路电压源和电源管理电路的电压调节电路的寄存器。 这些测量电路提供信号以控制电压调节电路,用于基于在半导体器件上获得的测量值来调节输出到集成电路的电压。 这些测量包括半导体衬底上的位置处的温度,IR下降以及集成电路的频率响应。

    Expanded scope incrementor
    5.
    发明授权
    Expanded scope incrementor 失效
    扩展范围增量器

    公开(公告)号:US08554821B2

    公开(公告)日:2013-10-08

    申请号:US12852660

    申请日:2010-08-09

    申请人: Deepak K. Singh

    发明人: Deepak K. Singh

    IPC分类号: G06F7/50

    CPC分类号: G06F7/5055

    摘要: An incrementor circuit and method for incrementing is provided that computes an output data word by increasing an input data word magnitude by one of several integer values. The incrementor circuit includes a mode increment signal circuit providing a designation of one of the integer values for increasing the input data word magnitude. A single constant incrementor is connected to the mode increment signal circuit and the input data word and provides an intermediate sum by selectively adding a constant to the input data word. A multiplex circuit logically combines selected input data word bit position values with the mode increment signal circuit designation forming logical bit position values and directs selected input data word bit position values, selected logical bit position values, and selected bit position values of the intermediate sum to form the output data word.

    摘要翻译: 提供了一种用于递增的递增器电路和方法,其通过将输入数据字幅度增加到几个整数值之一来计算输出数据字。 增量器电路包括模式增量信号电路,其提供用于增加输入数据字幅度的整数值之一的指定。 单个常数增量器连接到模式增量信号电路和输入数据字,并通过选择性地向输入数据字添加常数来提供中间和。 多路复用电路将所选择的输入数据字位位置值与形成逻辑位位置值的模式增量信号电路指定逻辑组合,并将所选择的输入数据字位位置值,所选择的逻辑位位置值和中间和的选定位位置值引导到 形成输出数据字。

    Fan speed control from thermal diode measurement
    6.
    发明授权
    Fan speed control from thermal diode measurement 失效
    风扇速度控制从热二极管测量

    公开(公告)号:US08219261B2

    公开(公告)日:2012-07-10

    申请号:US12880466

    申请日:2010-09-13

    IPC分类号: G05D23/00

    CPC分类号: F04D27/004

    摘要: Measurement circuit components are included in an integrated circuit fabricated on a semiconductor substrate. A method is provided for controlling the speed of a cooling fan provided to cool an integrated circuit in which includes the steps of receiving a voltage from a thermal diode, addressing a table of digital temperatures by incrementing the address of the table entries every clock cycle of a circuit clock, converting the addressed data to a second voltage representing temperature, comparing the first voltage to the second voltage, providing a resulting temperature when both the first and second voltages are equal, and adjusting the fan speed accordingly.

    摘要翻译: 测量电路元件包括在制造在半导体衬底上的集成电路中。 提供了一种用于控制设置用于冷却集成电路的冷却风扇的速度的方法,其中包括从热二极管接收电压的步骤,通过将每个时钟周期的每个时钟周期的表项的地址递增 电路时钟,将寻址的数据转换为表示温度的第二电压,将第一电压与第二电压进行比较,当第一和第二电压都相等时提供所得到的温度,并相应地调整风扇速度。

    Instruction dependent dynamic voltage compensation
    7.
    发明授权
    Instruction dependent dynamic voltage compensation 失效
    指令依赖动态电压补偿

    公开(公告)号:US07895454B2

    公开(公告)日:2011-02-22

    申请号:US11671579

    申请日:2007-02-06

    申请人: Deepak K. Singh

    发明人: Deepak K. Singh

    IPC分类号: G06F1/26 G06F1/32

    摘要: A method for compensating for dynamic IR (voltage) drop for instruction execution. In a data processing system having a memory, and a central processing unit (CPU), where the CPU includes an adaptive power supply, a method is provided for determining the power required for instruction execution, adjusting power supplied by the adaptive power supply to the CPU to execute the instruction, and dispatching the instruction from the memory to the CPU for execution.

    摘要翻译: 用于补偿指令执行的动态IR(电压)下降的方法。 在具有存储器的数据处理系统和中央处理单元(CPU)中,其中CPU包括自适应电源,提供了一种用于确定指令执行所需的功率的方法,将由自适应电源提供的功率调整到 CPU执行指令,并将指令从存储器发送到CPU执行。

    USING IR DROP DATA FOR INSTRUCTION THREAD DIRECTION
    8.
    发明申请
    USING IR DROP DATA FOR INSTRUCTION THREAD DIRECTION 有权
    使用IR DROP数据进行指令螺纹方向

    公开(公告)号:US20080189516A1

    公开(公告)日:2008-08-07

    申请号:US11671613

    申请日:2007-02-06

    IPC分类号: G06F9/30

    摘要: A data processing system having a memory for storing instructions and several central processing units for executing instructions, each central processing unit including an adaptive power supply which provides, among other data, IR (voltage) drop information. Circuitry is provided that receives the IR drop information from the many central processing units, selects a central processing unit which has the lowest IR drop and which is available to execute instructions and dispatches instructions to the selected central processing unit from the memory.

    摘要翻译: 一种具有用于存储指令的存储器和用于执行指令的几个中央处理单元的数据处理系统,每个中央处理单元包括自适应电源,其提供IR(电压)丢弃信息等。 提供了从许多中央处理单元接收IR丢弃信息的电路,选择具有最低IR丢弃的中央处理单元,并且可用于执行指令并从存储器向所选择的中央处理单元发送指令。

    TEMPERATURE DEPENDENT VOLTAGE SOURCE COMPENSATION
    9.
    发明申请
    TEMPERATURE DEPENDENT VOLTAGE SOURCE COMPENSATION 有权
    温度相关电压源补偿

    公开(公告)号:US20080186002A1

    公开(公告)日:2008-08-07

    申请号:US11671568

    申请日:2007-02-06

    IPC分类号: G05F1/10

    CPC分类号: G06F1/26 Y10S323/907

    摘要: A circuit and a method for regulating a voltage supply where the method includes the steps of concurrently measuring temperature, IR drop and frequency response within the circuit, adjusting voltage supplied to the circuit in response to the measured temperature, IR drop and frequency response, and determining a correction value based on the variance of the measured frequency response from an expected frequency response and providing a correction for subsequent predetermined frequency response values. The frequency response measurement is dependent upon the constant bandgap voltage source which may very according to temperature. Upon a determination that corrections may be required for the bandgap voltage source to compensate for temperature variations, the measurement process which uses the bandgap voltage source can be altered to compensate for the temperature variations.

    摘要翻译: 一种用于调节电压源的电路和方法,其中该方法包括同时测量电路内的温度,IR降低和频率响应的步骤,响应于测量的温度,IR降低和频率响应调整提供给电路的电压,以及 基于来自预期频率响应的所测量的频率响应的方差来确定校正值,并为随后的预定频率响应值提供校正。 频率响应测量取决于可能非常根据温度的恒定带隙电压源。 在确定带隙电压源可能需要校正以补偿温度变化的情况下,可以改变使用带隙电压源的测量过程以补偿温度变化。

    METHOD TO SAVE BUS SWITCHING POWER AND REDUCE NOISE IN AN ENGINEERED BUS
    10.
    发明申请
    METHOD TO SAVE BUS SWITCHING POWER AND REDUCE NOISE IN AN ENGINEERED BUS 有权
    保存总线开关电源并减少工程总线噪声的方法

    公开(公告)号:US20080126666A1

    公开(公告)日:2008-05-29

    申请号:US11564563

    申请日:2006-11-29

    IPC分类号: G06F13/36

    摘要: A computer implemented method, bus switching system, and computer usable program code are provided for saving bus switching power and reducing noise. A request for data is received from a requester by a first cache. A determination is made as to whether the data is stored on the first cache. Responsive to determining that the data is stored on the first cache, a bus in a plurality of buses is identified on which to return the data forming an identified bus. The data is sent to the requester on the identified bus. A logical state is initiated on the remaining plurality of buses stemming from the first cache in order to save bus switching power and reducing noise.

    摘要翻译: 提供了计算机实现的方法,总线交换系统和计算机可用程序代码,用于节省总线开关功率并降低噪声。 通过第一高速缓存从请求者接收对数据的请求。 确定数据是否存储在第一高速缓存上。 响应于确定数据存储在第一高速缓存上,识别出多个总线中的总线,以在其上返回形成识别的总线的数据。 数据在所识别的总线上发送到请求者。 为了节省总线开关功率并降低噪声,起始于从第一高速缓冲存储器产生的剩余多个总线上的逻辑状态。