知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

36 records (took 0.018 seconds)

    Low temperature ion implantation
    1.
    发明授权
    Low temperature ion implantation 有权
    低温离子注入

    公开(公告)号：US08101528B2

    公开(公告)日：2012-01-24

    申请号：US12850317

    申请日：2010-08-04

    Applicant: Christopher R. Hatem ,  Benjamin Colombeau

    Inventor： Christopher R. Hatem ,  Benjamin Colombeau

    IPC: H01L21/31

    CPC classification number: H01L21/2236 ,  H01L21/265 ,  H01L21/26513 ,  H01L21/268

    Abstract: A method of processing to a substrate while minimizing cost and manufacturing time is disclosed. The implantation of the source and drain regions of a semiconductor device are performed at low temperatures, such as below 273° K. This low temperature implant reduces the structural damage caused by the impacting ions. Subsequently, the implanted substrate is activated using faster forms of annealing. By performing the implant at low temperatures, the damage to the substrate is reduced, thereby allowing a fast anneal to be used to activate the dopants, while eliminating the majority of the defects and damage. Fast annealing is less expensive than conventional furnace annealing, and can achieve higher throughput at lower costs.

    Abstract translation: 公开了一种在最小化成本和制造时间的同时对基板进行处理的方法。 半导体器件的源极和漏极区域的注入在诸如低于273°K的低温下进行。该低温植入物减少了由冲击离子引起的结构损伤。 随后，使用更快形式的退火激活注入的衬底。 通过在低温下进行植入，对衬底的损伤降低，从而允许使用快速退火来激活掺杂剂，同时消除大部分缺陷和损伤。 快速退火比传统的炉退火更便宜，并且可以以更低的成本实现更高的产量。

    Low Temperature Ion Implantation
    3.
    发明申请
    Low Temperature Ion Implantation 有权
    低温离子注入

    公开(公告)号：US20110034013A1

    公开(公告)日：2011-02-10

    申请号：US12850317

    申请日：2010-08-04

    Applicant: Christopher R. Hatem ,  Benjamin Colombeau

    Inventor： Christopher R. Hatem ,  Benjamin Colombeau

    IPC: H01L21/265

    CPC classification number: H01L21/2236 ,  H01L21/265 ,  H01L21/26513 ,  H01L21/268

    Abstract: A method of processing to a substrate while minimizing cost and manufacturing time is disclosed. The implantation of the source and drain regions of a semiconductor device are performed at low temperatures, such as below 273° K. This low temperature implant reduces the structural damage caused by the impacting ions. Subsequently, the implanted substrate is activated using faster forms of annealing. By performing the implant at low temperatures, the damage to the substrate is reduced, thereby allowing a fast anneal to be used to activate the dopants, while eliminating the majority of the defects and damage. Fast annealing is less expensive than conventional furnace annealing, and can achieve higher throughput at lower costs.

    Abstract translation: 公开了一种在最小化成本和制造时间的同时对基板进行处理的方法。 半导体器件的源极和漏极区域的注入在诸如低于273°K的低温下进行。该低温植入物减少了由冲击离子引起的结构损伤。 随后，使用更快形式的退火激活注入的衬底。 通过在低温下进行植入，对衬底的损伤降低，从而允许使用快速退火来激活掺杂剂，同时消除大部分缺陷和损伤。 快速退火比传统的炉退火更便宜，并且可以以更低的成本实现更高的产量。

    Formation Of Raised Source/Drain On A Strained Thin Film Implanted With Cold And/Or Molecular Carbon
    4.
    发明申请
    Formation Of Raised Source/Drain On A Strained Thin Film Implanted With Cold And/Or Molecular Carbon 审中-公开
    在冷和/或分子碳上施加的应变薄膜上形成源/排水

    公开(公告)号：US20100279479A1

    公开(公告)日：2010-11-04

    申请号：US12434364

    申请日：2009-05-01

    Applicant: Christopher R. Hatem ,  Helen L. Maynard ,  Deepak A. Ramappa

    Inventor： Christopher R. Hatem ,  Helen L. Maynard ,  Deepak A. Ramappa

    IPC: H01L21/30

    CPC classification number: H01L21/26506 ,  H01L21/26513 ,  H01L21/2658 ,  H01L21/26593 ,  H01L29/165 ,  H01L29/41783 ,  H01L29/7848

    Abstract: A method is disclosed for enhancing tensile stress in the channel region of a semiconductor structure. The method includes performing one or more cold-carbon or molecular carbon ion implantation steps to implant carbon ions within the semiconductor structure to create strain layers on either side of a channel region. Raised source/drain regions are then formed above the strain layers, and subsequent ion implantation steps are used to dope the raised source/drain region. A millisecond anneal step activates the strain layers and the raised source/drain regions. The strain layers enhances carrier mobility within a channel region of the semiconductor structure, while the raised source/drain regions minimize reduction in strain in the strain layer caused by subsequent implantation of dopant ions in the raised source/drain regions.

    Abstract translation: 公开了一种用于增强半导体结构的沟道区域中的拉伸应力的方法。 该方法包括执行一个或多个冷碳或分子碳离子注入步骤以在半导体结构内注入碳离子，以在沟道区的任一侧产生应变层。 然后在应变层上方形成升高的源极/漏极区域，并且随后的离子注入步骤用于掺杂升高的源极/漏极区域。 毫秒退火步骤激活应变层和升高的源极/漏极区域。 应变层增强了半导体结构的沟道区域内的载流子迁移率，而凸起的源极/漏极区域最小化了由于在升高的源极/漏极区域中随后注入掺杂剂离子引起的应变层中的应变减小。

    Ion implantation device with a dual pumping mode and method thereof
    5.
    发明授权
    Ion implantation device with a dual pumping mode and method thereof 有权
    具有双泵浦模式的离子注入装置及其方法

    公开(公告)号：US07622722B2

    公开(公告)日：2009-11-24

    申请号：US11866099

    申请日：2007-10-02

    Applicant: Jonathan Gerald England ,  Christopher R. Hatem ,  Jay Thomas Scheuer ,  Joseph C. Olson

    Inventor： Jonathan Gerald England ,  Christopher R. Hatem ,  Jay Thomas Scheuer ,  Joseph C. Olson

    IPC: H01J49/10 ,  H01J49/24

    CPC classification number: H01J27/022 ,  H01J37/08 ,  H01J37/302 ,  H01J37/3171 ,  H01J2237/006 ,  H01J2237/182

    Abstract: An ion implantation device with a dual pumping mode and method thereof for use in producing atomic or molecular ion beams are disclosed. In one particular exemplary embodiment, an ion implantation apparatus is provided for controlling a pressure within an ion beam source housing corresponding to an ion beam species being produced. The ion implantation apparatus may include the ion beam source housing comprising a plurality of species for use in ion beam production. A pumping section may also be included for evacuating gas from the ion beam source housing. A controller may further be included for controlling the pumping section according to pumping parameters corresponding to a species of the plurality of species being used for ion beam production.

    Abstract translation: 公开了一种用于生产原子或分子离子束的双泵浦模式及其方法的离子注入装置。 在一个特定的示例性实施例中，提供离子注入装置，用于控制对应于正在产生的离子束种类的离子束源壳体内的压力。 离子注入装置可以包括离子束源壳体，其包括用于离子束产生的多个物质。 还可以包括泵送部分以从离子束源壳体排出气体。 可以进一步包括控制器，以根据对应于用于离子束产生的多种物质的种类的泵送参数来控制泵送部分。

    TECHNIQUES FOR FORMING SHALLOW JUNCTIONS
    6.
    发明申请
    TECHNIQUES FOR FORMING SHALLOW JUNCTIONS 有权
    形成小结的技术

    公开(公告)号：US20080108208A1

    公开(公告)日：2008-05-08

    申请号：US11733467

    申请日：2007-04-10

    Applicant: Edwin A. Arevalo ,  Christopher R. Hatem ,  Anthony Renau ,  Jonathan Gerald England

    Inventor： Edwin A. Arevalo ,  Christopher R. Hatem ,  Anthony Renau ,  Jonathan Gerald England

    IPC: H01L21/425

    CPC classification number: H01L21/26506 ,  H01J2237/2001 ,  H01J2237/31701 ,  H01L21/26513 ,  H01L21/2658 ,  H01L21/26593

    Abstract: Techniques for forming shallow junctions are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method for forming shallow junctions. The method may comprise generating an ion beam comprising molecular ions based on one or more materials selected from a group consisting of: digermane (Ge2H6), germanium nitride (Ge3N4), germanium-fluorine compounds (GFn, wherein n=1, 2, or 3), and other germanium-containing compounds. The method may also comprise causing the ion beam to impact a semiconductor wafer.

    Abstract translation: 公开了形成浅结的技术。 在一个特定的示例性实施例中，可以将技术实现为用于形成浅结的方法。 该方法可以包括产生基于选自以下的一种或多种材料的分子离子的离子束：二氧化锗（Ge 2 H 6 H 6），氮化锗（Ge 3-N 3），锗 - 氟化合物（GF n n，其中n = 1,2或3）和其它含锗的 化合物。 该方法还可以包括使离子束撞击半导体晶片。

    REDUCED IMPLANT VOLTAGE DURING ION IMPLANTATION
    7.
    发明申请
    REDUCED IMPLANT VOLTAGE DURING ION IMPLANTATION 审中-公开
    离子植入期间减少的植入电压

    公开(公告)号：US20100084583A1

    公开(公告)日：2010-04-08

    申请号：US12245938

    申请日：2008-10-06

    Applicant: Christopher R. Hatem ,  Ludovic Godet

    Inventor： Christopher R. Hatem ,  Ludovic Godet

    IPC: H01J37/08

    CPC classification number: H01J37/3171 ,  H01J37/3023 ,  H01J2237/047 ,  H01J2237/04735 ,  H01J2237/04756 ,  H01J2237/304 ,  H01J2237/30433 ,  H01J2237/30455 ,  H01J2237/30472 ,  H01J2237/31701 ,  H01J2237/31703

    Abstract: A method for ion implantation is disclosed which includes decreasing the implant energy level as the implant process is ongoing. In this way, either a box-like profile or a profile with higher retained dose can be achieved, enabling enhanced activation at the same junction depth. In one embodiment, the initial implant energy is used to implant about 25% of the dose. The implant energy level is then reduced and an additional 50% of the dose is implanted. The implant energy is subsequently decreased again and the remainder of the dose is implanted. The initial portion of the dose can optionally be performed at cold, such as cryogenic temperatures, to maximize amorphization of the substrate.

    Abstract translation: 公开了一种用于离子注入的方法，其包括当植入过程正在进行时降低植入能量水平。 以这种方式，可以实现具有更高保留剂量的盒状轮廓或轮廓，使得能够在相同的结深处增强激活。 在一个实施例中，初始植入能量用于植入约25％的剂量。 然后植入能量水平降低，另外50％的剂量被植入。 随后植入能量再次减少，并且植入其余的剂量。 剂量的初始部分可以任选地在冷的温度下进行，例如低温，以使底物的非晶化最大化。

    Techniques for providing ion source feed materials
    8.
    发明授权
    Techniques for providing ion source feed materials 有权
    提供离子源饲料的技术

    公开(公告)号：US07655932B2

    公开(公告)日：2010-02-02

    申请号：US11776217

    申请日：2007-07-11

    Applicant: Christopher R. Hatem ,  Craig R. Chaney ,  Eric R. Cobb ,  Joseph C. Olson ,  Chris Campbell

    Inventor： Christopher R. Hatem ,  Craig R. Chaney ,  Eric R. Cobb ,  Joseph C. Olson ,  Chris Campbell

    IPC: H01J49/10 ,  H01J27/02

    CPC classification number: H01J27/02 ,  C23C14/246 ,  C23C14/48 ,  H01J37/08 ,  H01J37/3171 ,  H01J2237/006

    Abstract: Techniques for providing ion source feed materials are disclosed. In one particular exemplary embodiment, the techniques may be realized as a container for supplying an ion source feed material. The container may comprise an internal cavity to be pre-filled with an ion source feed material. The container may also comprise an outer body configured to be removably loaded into a corresponding housing that is coupled to an ion source chamber via a nozzle assembly. The container may further comprise an outlet to seal in the pre-filled ion source feed material, the outlet being further configured to engage with the nozzle assembly to establish a flow path between the internal cavity and the ion source chamber. The container may be configured to be a disposable component.

    Abstract translation: 公开了提供离子源进料的技术。 在一个特定的示例性实施例中，这些技术可以被实现为用于提供离子源进料的容器。 容器可以包括预先填充有离子源进料的内部空腔。 容器还可以包括被配置为可移除地装载到经由喷嘴组件耦合到离子源室的相应壳体中的外主体。 容器还可包括密封在预填充的离子源进料中的出口，该出口进一步构造成与喷嘴组件接合以在内腔和离子源室之间建立流路。 容器可以被配置为一次性部件。

    Self-aligned masking for solar cell manufacture
    10.
    发明授权
    Self-aligned masking for solar cell manufacture 失效
    用于太阳能电池制造的自对准掩模

    公开(公告)号：US08465909B2

    公开(公告)日：2013-06-18

    申请号：US12916993

    申请日：2010-11-01

    Applicant: Nicholas P. T. Bateman ,  Helen L. Maynard ,  Benjamin B. Riordon ,  Christopher R. Hatem ,  Deepak Ramappa

    Inventor： Nicholas P. T. Bateman ,  Helen L. Maynard ,  Benjamin B. Riordon ,  Christopher R. Hatem ,  Deepak Ramappa

    IPC: G03F7/20

    CPC classification number: H01L31/0682 ,  H01L21/266 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

    Abstract: Various methods of utilizing the physical and chemical property differences between amorphized and crystalline silicon are used to create masks that can be used for subsequent implants. In some embodiments, the difference in film growth between amorphous and crystalline silicon is used to create the mask. In other embodiments, the difference in reflectivity or light absorption between amorphous and crystalline silicon is used to create the mask. In other embodiments, differences in the characteristics of doped and undoped silicon is used to create masks.

    Abstract translation: 使用利用非晶化和晶体硅之间的物理和化学性质差异的各种方法来产生可用于后续植入物的掩模。 在一些实施方案中，使用无定形和晶体硅之间的膜生长差异来产生掩模。 在其他实施例中，使用非晶硅和晶体硅之间的反射率或光吸收的差异来产生掩模。 在其他实施例中，掺杂和未掺杂硅的特性的差异被用于产生掩模。

Patent Agency Ranking