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公开(公告)号：US07136682B2
公开(公告)日：2006-11-14
申请号：US10263667
申请日：2002-10-04
Applicant: Chien-Min Lin
Inventor： Chien-Min Lin
CPC classification number: H02J7/0045 , H02J7/0063
Abstract: A portable electronic system equipped with a spare battery device. The portable electronic system includes a spare battery device and a portable device. The spare battery device includes a first fixer unit, a power storage unit and a sensory control unit. The sensory control unit further includes a constant voltage source, a resistor, a resilient object, output contact pads, and a control unit. The portable device includes a second fixer unit, a covering, and input contact pads. By adjusting the coupling relationship between the first fixer unit and the second fixer unit, each output contact pad can be coupled to the associated input contact pads; and the control unit is for controlling output power of the spare battery device.
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公开(公告)号：US08669658B2
公开(公告)日：2014-03-11
申请号：US11782384
申请日：2007-07-24
Applicant: Mon-Chin Tsai , Hsiu-Mei Yo , Chien-Min Lin , Chia-Jen Cheng , Li-Hsin Tseng
Inventor： Mon-Chin Tsai , Hsiu-Mei Yo , Chien-Min Lin , Chia-Jen Cheng , Li-Hsin Tseng
IPC: H01L23/48
CPC classification number: H01L23/66 , H01L23/3114 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/03462 , H01L2224/0401 , H01L2224/05559 , H01L2224/05647 , H01L2224/131 , H01L2224/94 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/3025 , H01L2924/00014 , H01L2224/03 , H01L2924/01014 , H01L2924/00
Abstract: A structure, a system, and a method for manufacture of crosstalk-free wafer level chip scale packaging (WLCSP) structure for high frequency applications is provided. An illustrative embodiment comprises a substrate on which various layers and structures form circuitry, a signal pin formed on the substrate and coupled with the circuitry, a ground ring encircling the signal pin, and a grounded solder bump coupled to the ground ring.
Abstract translation: 提供了用于高频应用的用于制造无串扰晶片级芯片级封装（WLCSP）结构的结构，系统和方法。 示例性实施例包括其上各种层和结构形成电路的衬底，形成在衬底上并与电路耦合的信号引脚，环绕信号引脚的接地环和耦合到接地环的接地焊料凸块。
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公开(公告)号：US08513795B2
公开(公告)日：2013-08-20
申请号：US13337346
申请日：2011-12-27
Applicant: Ping-Lin Yang , Sa-Lly Liu , Chien-Min Lin
Inventor： Ping-Lin Yang , Sa-Lly Liu , Chien-Min Lin
IPC: H01L23/02
CPC classification number: H01L24/82 , H01L23/3677 , H01L23/48 , H01L23/5227 , H01L24/16 , H01L25/0657 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73253 , H01L2225/06517 , H01L2225/06531 , H01L2225/06551 , H01L2225/06572 , H01L2225/06589 , H01L2924/15788 , H01L2924/00 , H01L2224/05647 , H01L2924/00014
Abstract: A package comprises a die stack having at least two stacked dies coupled for contactless communications with each other. At least one of the stacked dies has a substrate joined to its major face. The substrate has a plurality of conductive traces in or on the substrate for conducting power to the dies and for conducting heat from the dies. At least one conductive pillar is joined to at least one of the conductive traces on at least a first edge of the substrate, for conducting power to the at least one die and for conducting heat from the at least one die.
Abstract translation: 封装包括具有至少两个堆叠管芯的管芯堆叠，用于彼此进行非接触式通信。 堆叠的模具中的至少一个具有连接到其主面的衬底。 衬底在衬底中或衬底上具有多个导电迹线，用于向裸片传导功率并且用于从模具传导热量。 至少一个导电柱与基板的至少第一边缘上的导电迹线中的至少一个接合，用于将功率传导到至少一个管芯并且用于从至少一个管芯传导热量。
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公开(公告)号：US20130161811A1
公开(公告)日：2013-06-27
申请号：US13337346
申请日：2011-12-27
Applicant: Ping-Lin YANG , Sa-Lly LIU , Chien-Min LIN
Inventor： Ping-Lin YANG , Sa-Lly LIU , Chien-Min LIN
IPC: H01L23/498 , H01L21/50
CPC classification number: H01L24/82 , H01L23/3677 , H01L23/48 , H01L23/5227 , H01L24/16 , H01L25/0657 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73253 , H01L2225/06517 , H01L2225/06531 , H01L2225/06551 , H01L2225/06572 , H01L2225/06589 , H01L2924/15788 , H01L2924/00 , H01L2224/05647 , H01L2924/00014
Abstract: A package comprises a die stack having at least two stacked dies coupled for contactless communications with each other. At least one of the stacked dies has a substrate joined to its major face. The substrate has a plurality of conductive traces in or on the substrate for conducting power to the dies and for conducting heat from the dies. At least one conductive pillar is joined to at least one of the conductive traces on at least a first edge of the substrate, for conducting power to the at least one die and for conducting heat from the at least one die.
Abstract translation: 封装包括具有至少两个堆叠管芯的管芯堆叠，用于彼此进行非接触式通信。 堆叠的模具中的至少一个具有连接到其主面的衬底。 衬底在衬底中或衬底上具有多个导电迹线，用于向裸片传导功率并且用于从模具传导热量。 至少一个导电柱与基板的至少第一边缘上的导电迹线中的至少一个接合，用于将功率传导到至少一个管芯并且用于从至少一个管芯传导热量。
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公开(公告)号：US06816740B2
公开(公告)日：2004-11-09
申请号：US09809316
申请日：2001-03-16
Applicant: Chien-Min Lin
Inventor： Chien-Min Lin
IPC: H04B138
CPC classification number: H04B1/3883 , H02J7/0044
Abstract: A recharge apparatus for holding the rechargeable device and battery includes the cradle top and the cradle base. The cradle top includes the elastic gate, the battery-fixing clip, and the charge area. The elastic gate is an opening for inserting the rechargeable battery, and capable of rebounding against pressure so that the elastic gate does not clip the user's finger during operation, and also enhances the appearance as well as being dust-proof. The battery-fixing clip is used for clipping the rechargeable battery tightly. The charge area is an inserting area for charging the rechargeable devices, and has a stand pin to hold the rechargeable devices steadily by inserting the stand pin into the bottom of the rechargeable device. The cradle base assembled with the cradle top includes the elastic joint and recharge PCB (printed circuit board). One end of the elastic joint is designed as the upward curve to touch the rechargeable battery. When the rechargeable battery is inserted to recharge, the elastic joint is pressed downward, resulting in an upward rebounding force. In this way, the rechargeable battery is connected to the recharge PCB via the elastic joint.
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Patent Agency Ranking
公开(公告)号：US06622920B2
公开(公告)日：2003-09-23
申请号：US09810443
申请日：2001-03-19
Applicant: San-Chi Ho , Chien-Min Lin
Inventor： San-Chi Ho , Chien-Min Lin
IPC: G06K710
CPC classification number: H01H25/041 , H01H25/008 , H01H2239/048
Abstract: An operating button with multiple functions comprising the functions of the four-direction control key, the action control key and the speaker is equipped in the handheld products. The operating button includes the housing, the four-direction and action control assembly, and the speaker, wherein the four-direction and action control assembly includes a spring.
Abstract translation: 具有多功能的操作按钮，包括四方向控制键，动作控制键和扬声器的功能，在手持产品中。 操作按钮包括壳体，四向和动作控制组件以及扬声器，其中四方向和动作控制组件包括弹簧。
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公开(公告)号：US07679926B2
公开(公告)日：2010-03-16
申请号：US11843382
申请日：2007-08-22
Applicant: Kuo-Ching Steven Hsu , Chien-Min Lin , Tzong-Lin Wu , Guan-Tzong Wu
Inventor： Kuo-Ching Steven Hsu , Chien-Min Lin , Tzong-Lin Wu , Guan-Tzong Wu
IPC: H05K1/18
CPC classification number: H05K1/162 , H05K2201/0187 , H05K2201/09309
Abstract: A circuit structure is provided. The circuit structure includes a capacitor including a top capacitor electrode; a bottom capacitor electrode parallel to the top capacitor electrode; and an insulating layer between the top and the bottom capacitor electrodes. The insulating layer includes a dielectric rod enclosed by a dielectric material. The dielectric rod has a higher dielectric constant than that of the dielectric material. The circuit structure may be a printed circuit board or packaging substrate, wherein the capacitor is formed between the two layers of the capacitor. Additional dielectric rods may be formed in the insulating layer of the capacitor and spaced apart from the dielectric rods.
Abstract translation: 提供电路结构。 电路结构包括：电容器，其包括顶部电容器电极; 平行于顶部电容器电极的底部电容器电极; 以及顶部和底部电容器电极之间的绝缘层。 绝缘层包括由介电材料包围的介电棒。 介电棒具有比介电材料更高的介电常数。 电路结构可以是印刷电路板或封装衬底，其中电容器形成在电容器的两层之间。 可以在电容器的绝缘层中形成另外的介质棒，并与电介质棒间隔开。
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公开(公告)号：US20090050356A1
公开(公告)日：2009-02-26
申请号：US11843382
申请日：2007-08-22
Applicant: Kuo-Ching "Steven" Hsu , Chien-Min Lin , Tzong-Lin Wu , Guan-Tzong Wu
Inventor： Kuo-Ching "Steven" Hsu , Chien-Min Lin , Tzong-Lin Wu , Guan-Tzong Wu
CPC classification number: H05K1/162 , H05K2201/0187 , H05K2201/09309
Abstract: A circuit structure is provided. The circuit structure includes a capacitor including a top capacitor electrode; a bottom capacitor electrode parallel to the top capacitor electrode; and an insulating layer between the top and the bottom capacitor electrodes. The insulating layer includes a dielectric rod enclosed by a dielectric material. The dielectric rod has a higher dielectric constant than that of the dielectric material. The circuit structure may be a printed circuit board or packaging substrate, wherein the capacitor is formed between the two layers of the capacitor. Additional dielectric rods may be formed in the insulating layer of the capacitor and spaced apart from the dielectric rods.
Abstract translation: 提供电路结构。 电路结构包括：电容器，其包括顶部电容器电极; 平行于顶部电容器电极的底部电容器电极; 以及顶部和底部电容器电极之间的绝缘层。 绝缘层包括由介电材料包围的介电棒。 介电棒具有比介电材料更高的介电常数。 电路结构可以是印刷电路板或封装衬底，其中电容器形成在电容器的两层之间。 可以在电容器的绝缘层中形成另外的介质棒，并与电介质棒间隔开。
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公开(公告)号：US20090026608A1
公开(公告)日：2009-01-29
申请号：US11782384
申请日：2007-07-24
Applicant: Mon-Chin Tsai , Hsiu-Mei Yo , Chien-Min Lin , Chia-Jen Cheng , Li-Hsin Tseng
Inventor： Mon-Chin Tsai , Hsiu-Mei Yo , Chien-Min Lin , Chia-Jen Cheng , Li-Hsin Tseng
CPC classification number: H01L23/66 , H01L23/3114 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/03462 , H01L2224/0401 , H01L2224/05559 , H01L2224/05647 , H01L2224/131 , H01L2224/94 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/3025 , H01L2924/00014 , H01L2224/03 , H01L2924/01014 , H01L2924/00
Abstract: A structure, a system, and a method for manufacture of crosstalk-free wafer level chip scale packaging (WLCSP) structure for high frequency applications is provided. An illustrative embodiment comprises a substrate on which various layers and structures form circuitry, a signal pin formed on the substrate and coupled with the circuitry, a ground ring encircling the signal pin, and a grounded solder bump coupled to the ground ring.
Abstract translation: 提供了用于高频应用的用于制造无串扰晶片级芯片级封装（WLCSP）结构的结构，系统和方法。 示例性实施例包括其上各种层和结构形成电路的衬底，形成在衬底上并与电路耦合的信号引脚，环绕信号引脚的接地环和耦合到接地环的接地焊料凸块。
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公开(公告)号：US08373250B2
公开(公告)日：2013-02-12
申请号：US12607433
申请日：2009-10-28
Applicant: Tzu-Yuan Chao , Ming-Chieh Hsu , Yu-Ting Cheng , Chih Chen , Chien-Min Lin
Inventor： Tzu-Yuan Chao , Ming-Chieh Hsu , Yu-Ting Cheng , Chih Chen , Chien-Min Lin
IPC: H01L29/86
CPC classification number: H01L28/10
Abstract: The present invention relates to a an on-chip inductor structure and a method for manufacturing the same. The an on-chip inductor structure according to the present invention comprises a substrate, a porous layer, a plurality of conductors, and an inductor. The porous layer is disposed on the substrate and has a plurality of voids; each of the plurality of conductors is disposed in the plurality of voids, respectively; and the inductor is disposed on the porous layer. Because the plurality of conductors is used as the core of the inductor, the inductance is increased effectively and the area of the an on-chip inductor is reduced. Besides the manufacturing method according to the present invention is simple and compatible with the current CMOS process, the manufacturing cost can be lowered.
Abstract translation: 片上电感器结构及其制造方法技术领域本发明涉及片上电感结构及其制造方法。 根据本发明的片上电感器结构包括衬底，多孔层，多个导体和电感器。 多孔层设置在基板上并具有多个空隙; 多个导体中的每一个分别设置在多个空隙中; 并且电感器设置在多孔层上。 由于使用多个导体作为电感的核心，所以电感被有效地增加并且片上电感器的面积减小。 此外，根据本发明的制造方法简单且兼容于目前的CMOS工艺，可以降低制造成本。
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