公开(公告)号：US08464589B2

公开(公告)日：2013-06-18

申请号：US12904169

申请日：2010-10-14

Applicant: Chien-Hsing Lee ,  Tsung-Min Hsieh ,  Li-Chi Tsao ,  Jhyy-Cheng Liou

Inventor： Chien-Hsing Lee ,  Tsung-Min Hsieh ,  Li-Chi Tsao ,  Jhyy-Cheng Liou

IPC: G01L7/08

CPC classification number: B81B3/0072 ,  B81B2201/0257 ,  H04R19/005

Abstract: A MEMS structure includes a substrate, a structural dielectric layer, and a diaphragm. A structural dielectric layer is disposed over the substrate. The diaphragm is held by the structural dielectric layer at a peripheral end. The diaphragm includes multiple trench/ridge rings at a peripheral region surrounding a central region of the diaphragm. A corrugated structure is located at the central region of the diaphragm, surrounded by the trench/indent rings.

Abstract translation: MEMS结构包括基板，结构介电层和隔膜。 结构介电层设置在衬底上。 隔膜由外周端的结构介电层保持。 隔膜包括围绕隔膜的中心区域的周边区域的多个沟槽/脊环。 波纹结构位于隔膜的中心区域，被沟槽/压痕环包围。

公开(公告)号：US20120090398A1

公开(公告)日：2012-04-19

申请号：US12904169

申请日：2010-10-14

Applicant: Chien-Hsing Lee ,  Tsung-Min Hsieh ,  Li-Chi Tsao ,  Jhyy-Cheng Liou

Inventor： Chien-Hsing Lee ,  Tsung-Min Hsieh ,  Li-Chi Tsao ,  Jhyy-Cheng Liou

IPC: G01L7/08

CPC classification number: B81B3/0072 ,  B81B2201/0257 ,  H04R19/005

Abstract: A MEMS structure includes a substrate, a structural dielectric layer, and a diaphragm. A structural dielectric layer is disposed over the substrate. The diaphragm is held by the structural dielectric layer at a peripheral end. The diaphragm includes multiple trench/ridge rings at a peripheral region surrounding a central region of the diaphragm. A corrugated structure is located at the central region of the diaphragm, surrounded by the trench/indent rings.

Abstract translation: MEMS结构包括基板，结构介电层和隔膜。 结构介电层设置在衬底上。 隔膜由外周端的结构介电层保持。 隔膜包括围绕隔膜的中心区域的周边区域的多个沟槽/脊环。 波纹结构位于隔膜的中心区域，被沟槽/压痕环包围。

公开(公告)号：US08093119B2

公开(公告)日：2012-01-10

申请号：US12490318

申请日：2009-06-24

Applicant: Tsung-Min Hsieh ,  Chien-Hsing Lee

Inventor： Tsung-Min Hsieh ,  Chien-Hsing Lee

IPC: H01L21/8238

CPC classification number: B81C1/00246 ,  B81B2201/0235 ,  B81C2203/0714 ,  G01L9/0042 ,  G01P15/0802 ,  G01P15/125 ,  G01P2015/0828

Abstract: A method for fabricating the MEMS device includes providing a substrate. Then, a structural dielectric layer is formed over the substrate at a first side, wherein a diaphragm is embedded in the structural dielectric layer. The substrate is patterned from a second side to form a cavity in corresponding to the diaphragm and a plurality of venting holes in the substrate. An isotropic etching process is performed from the first side and the second side of the substrate via vent holes to remove a dielectric portion of the structural dielectric layer for exposing a central portion of the diaphragm while an end portion is held by a residue portion of the structural dielectric layer.

Abstract translation: 一种用于制造MEMS器件的方法包括提供衬底。 然后，在第一面上在基板上形成结构介电层，其中隔膜嵌入在结构介电层中。 衬底从第二侧构图，以形成对应于隔膜的空腔和衬底中的多个排气孔。 从衬底的第一侧和第二侧经由通气孔进行各向同性蚀刻处理，以去除结构介质层的电介质部分，用于暴露隔膜的中心部分，同时端部被残留部分保持 结构介电层。

公开(公告)号：US20110165717A1

公开(公告)日：2011-07-07

申请号：US13052124

申请日：2011-03-21

Applicant: Chien-Hsing Lee ,  Tsung-Min Hsieh ,  Chih-Hsiang Lin

Inventor： Chien-Hsing Lee ,  Tsung-Min Hsieh ,  Chih-Hsiang Lin

IPC: H01L21/02

CPC classification number: B81B7/0061 ,  B81B2201/0257 ,  B81B2207/095 ,  B81B2207/096 ,  H01L2224/48091 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method for forming a micro-electro-mechanical systems (MEMS) package includes following steps. A plurality of MEMS units are formed on a substrate, and each of the MEMS units includes at least a MEMS sensing element and a first chamber over the MEMS sensing element. The MEMS units include electric connection pads. A plurality of covering units are formed correspondingly over the MEMS units. Each of the covering units provides a second chamber over the MEMS sensing element opposite to the first chamber. The covering units are adhered to the MEMS units by an adhesive material. The MEMS units are diced into singulated units.

Abstract translation: 微机电系统（MEMS）封装的方法包括以下步骤。 在基板上形成多个MEMS单元，并且每个MEMS单元至少包括MEMS感测元件和MEMS感测元件上的第一室。 MEMS单元包括电连接垫。 在MEMS单元上相应地形成多个覆盖单元。 每个覆盖单元在MEMS感测元件之上提供与第一室相对的第二室。 覆盖单元通过粘合剂材料粘附到MEMS单元。 MEMS单元切成单个单元。

公开(公告)号：US07951636B2

公开(公告)日：2011-05-31

申请号：US12235549

申请日：2008-09-22

Applicant: Chien-Hsing Lee ,  Tsung-Min Hsieh

Inventor： Chien-Hsing Lee ,  Tsung-Min Hsieh

IPC: H01L21/00

CPC classification number: B81C1/00246 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81C1/00182 ,  B81C2203/0714 ,  B81C2203/0735 ,  H01L29/84 ,  H04R19/005 ,  H04R19/04 ,  H04R31/003

Abstract: A micro-electro-mechanical system (MEMS) device includes a substrate, having a first side and second side, the second side has a cavity and a plurality of venting holes in the substrate at the second side with connection to the cavity. However, the cavity is included in option without absolute need. A structural dielectric layer has a dielectric structure and a conductive structure in the dielectric structure. The structural dielectric layer has a chamber in connection to the cavity by the venting holes. A suspension structure layer is formed above the chamber. An end portion is formed in the structural dielectric layer in fix position. A diaphragm has a first portion of the diaphragm fixed on the suspension structure layer while a second portion of the diaphragm is free without being fixed.

Abstract translation: 微电子机械系统（MEMS）装置包括具有第一侧和第二侧的基板，第二侧在第二侧具有空腔和多个通孔，第二侧具有连接到空腔的多个通气孔。 然而，空腔被包括在选项中，绝对不需要。 结构介电层在电介质结构中具有介电结构和导电结构。 结构介电层具有通过排气孔连接到空腔的腔室。 在室上形成悬浮结构层。 在固定位置的结构介电层中形成端部。 隔膜具有固定在悬架结构层上的隔膜的第一部分，而隔膜的第二部分是自由的而不固定。

公开(公告)号：US20100277229A1

公开(公告)日：2010-11-04

申请号：US12432758

申请日：2009-04-30

Applicant: Chien-Hsing Lee ,  Tsung-Min Hsieh ,  Shao-Yi Wu

Inventor： Chien-Hsing Lee ,  Tsung-Min Hsieh ,  Shao-Yi Wu

IPC: G05F1/10

CPC classification number: G01H11/06 ,  H04R1/04 ,  H04R19/005

Abstract: A microelectromechanical system (MEMS) device includes a diaphragm capacitor, connected between a capacitor biasing voltage source and a ground. A source follower circuit is coupled to the diaphragm capacitor. An amplifier is coupled to the source follower circuit to amplify the voltage signal as an output voltage signal. A programmable trimming circuit is implemented with the amplifier to trim a gain or implemented with the capacitor biasing voltage source to trim voltage applied on the diaphragm capacitor. Whereby, the output voltage signal has a target sensitivity.

Abstract translation: 微机电系统（MEMS）装置包括连接在电容器偏置电压源和地之间的隔膜电容器。 源极跟随器电路耦合到隔膜电容器。 放大器耦合到源极跟随器电路，以将电压信号放大为输出电压信号。 利用放大器实现可编程微调电路，以减小增益或用电容器偏置电压源来实现，以调节施加在隔膜电容器上的电压。 由此，输出电压信号具有目标灵敏度。

公开(公告)号：US20090166772A1

公开(公告)日：2009-07-02

申请号：US11967261

申请日：2007-12-31

Applicant: Tsung-Min Hsieh ,  Chien-Hsing Lee

Inventor： Tsung-Min Hsieh ,  Chien-Hsing Lee

IPC: H01L29/84 ,  H01L21/00

CPC classification number: B81C1/00182 ,  B81C1/00246 ,  B81C2201/014 ,  B81C2203/0714 ,  B81C2203/0735

Abstract: A micro-electro-mechanical systems (MEMS) device includes a back-plate substrate, having an intended region formed with a plurality of perforating holes. A first structural dielectric layer, disposed on the back-plate substrate, wherein the dielectric layer having an opening above the intended region. An etching stop layer, disposed over the first structural dielectric layer. A second structural dielectric layer, formed over the back-plate substrate. The etching stop layer and the second structural dielectric layer form at least a part of a micro-machine diaphragm, and cover over the opening of the first structural dielectric layer to form a chamber between the micro-machine diaphragm and the back-plate substrate.

Abstract translation: 微电子机械系统（MEMS）装置包括背板基板，其具有形成有多个穿孔的预期区域。 布置在所述背板基板上的第一结构介电层，其中所述电介质层具有在所述预定区域上方的开口。 设置在第一结构介电层上的蚀刻停止层。 形成在背板基板上的第二结构介电层。 蚀刻停止层和第二结构介电层形成微机隔膜的至少一部分，并且覆盖在第一结构介电层的开口上，以在微机隔膜和背板基板之间形成室。

公开(公告)号：US20060284240A1

公开(公告)日：2006-12-21

申请号：US11473578

申请日：2006-06-22

Applicant: Tsung-Min Hsieh ,  Chien-Hsing Lee ,  Chin-Hsi Lin ,  Jhyy-Cheng Liou

Inventor： Tsung-Min Hsieh ,  Chien-Hsing Lee ,  Chin-Hsi Lin ,  Jhyy-Cheng Liou

IPC: H01L29/788

CPC classification number: H01L27/115 ,  H01L27/11521 ,  H01L27/11524

Abstract: A nonvolatile memory device includes composite gate structures formed on a substrate in series along a bit line direction. The composite gate structure has a first storage gate structure, a second storage gate structure, and a selection gate between the two storage gate structures. Each of the composite gate structures is respectively coupled to two world line connection terminals at the two storage gate structures and a selection terminal at the selection gate. Each of the storage gate structures corresponds to a memory bit cell. Multiple doped regions are in the substrate between the composite gate structures. A first selection doped region are formed in the substrate and coupled between a BL connection terminal and a first edge one of the composite gate structure. A second selection doped region is formed in the substrate and coupled between a second edge one of the composite gate structures and a voltage terminal.

Abstract translation: 非易失性存储器件包括沿着位线方向串联地形成在衬底上的复合栅极结构。 复合栅极结构具有第一存储栅极结构，第二存储栅极结构和两个存储栅极结构之间的选择栅极。 复合栅极结构中的每一个分别耦合到两个存储栅极结构处的两个世界线连接端子和选择栅极处的选择端子。 每个存储门结构对应于存储器位单元。 多个掺杂区域在复合栅极结构之间的衬底中。 第一选择掺杂区域形成在衬底中并且耦合在BL连接端子和复合栅极结构中的第一边缘之间。 第二选择掺杂区域形成在衬底中并且耦合在复合栅极结构之一的第二边缘和电压端子之间。

公开(公告)号：US07119394B2

公开(公告)日：2006-10-10

申请号：US11297266

申请日：2005-12-07

Applicant: Tsung-Min Hsieh ,  Jhyy-Cheng Liou ,  Chien-Hsing Lee ,  Chin-Hsi Lin

Inventor： Tsung-Min Hsieh ,  Jhyy-Cheng Liou ,  Chien-Hsing Lee ,  Chin-Hsi Lin

IPC: H01L29/788

CPC classification number: G11C16/0491 ,  G11C16/0475 ,  H01L27/115 ,  H01L27/11568

Abstract: A structure of non-volatile memory has a plurality of buried bit lines in a substrate, extending along a first direction. Selection gate structure lines are located between the buried bit lines. A plurality of stack dielectric films on the both sides of the selection gate structure lines serving as a charge storage region, does not extend to the bit lines and a dielectric layer contacting a surface of substrate adjacent to stacked dielectric films. Word lines are over the substrate, wherein stacked dielectric films and a dielectric layer are interposed between WL and substrate on the region excluding the selection gate structure line, extending along a second direction different from the first direction. Since the charge storage layer does not completely cover between the selection gate structure lines and the bit lines, an additional control gate is formed.

公开(公告)号：US07094649B2

公开(公告)日：2006-08-22

申请号：US10886981

申请日：2004-07-07

Applicant: Chien-Hsing Lee ,  Chin-Hsi Lin ,  Jhyy-Cheng Liou

Inventor： Chien-Hsing Lee ,  Chin-Hsi Lin ,  Jhyy-Cheng Liou

IPC: H01L21/8236

CPC classification number: G11C11/5692 ,  G11C16/0483 ,  H01L27/112 ,  H01L27/1122 ,  H01L27/1126

Abstract: The present invention relates to a multi-level read only memory cell that can store two bits and the fabrication method thereof. The multi-level ROM cell has the storage capacity of two bits and the resultant NAND type ROM memory array can provide four logic states of two bits, thus increasing the data storage capacity.

Abstract translation: 本发明涉及可存储两位的多级只读存储器单元及其制造方法。 多级ROM单元具有两位的存储容量，并且所得的NAND型ROM存储器阵列可以提供两位的四个逻辑状态，从而增加数据存储容量。