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公开(公告)号：US20120189199A1
公开(公告)日：2012-07-26
申请号：US13200941
申请日：2011-10-05
申请人： Anthony Neil Berent
发明人： Anthony Neil Berent
IPC分类号： G06K9/36
CPC分类号： H04N1/644
摘要： An encoding method generates an encoded image according to a predetermined encoding format. The method includes the step of, for each block of pixels, determining an average colour of colours of the block of pixels in the predetermined colour space; selecting at least one luminance line in dependence on an offset in the colour space of the average colour from the at least one luminance line; identifying a set of candidate base colours lying on the at least one luminance line; and determining, using the set of candidate base colours and the luminance offset values, the set of encoded pixel colours. The base colour and the set of luminance offsets are selected in dependence on an encoding error indicative of a sum distance in the colour space between the set of encoded pixel colours and the colours of the block of pixels.
摘要翻译： 编码方法根据预定的编码格式生成编码图像。 该方法包括以下步骤：针对每个像素块，确定预定颜色空间中的像素块的颜色的平均颜色; 根据来自所述至少一个亮度线的所述平均颜色的颜色空间中的偏移来选择至少一个亮度线; 识别位于所述至少一个亮度线上的一组候选基色; 以及使用所述一组候选基色和亮度偏移值来确定编码像素颜色的集合。 根据指示编码像素颜色集合和像素块的颜色之间的颜色空间中的和距离的编码误差来选择基色和亮度偏移集合。
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公开(公告)号：US5954835A
公开(公告)日：1999-09-21
申请号：US442253
申请日：1995-05-15
CPC分类号： H04L1/0061 , H04L1/0065 , H04L1/0072 , H04L1/0083
摘要： A packet is originated in a unit 10 as a data field DATA 11 plus a CRC (cyclic redundancy check) check field CRC 12 by a CRC circuit 13. This packet has a header HDR (with a routing information field RIF) added to it in a unit 20, converting it into a message for transmission through a message network. A check correction field CCF is computed by unit 23 in unit 20, by looking up precomputed check subfields stored with the routing subfields (the routing information field being constructed by selecting from the stored subfields), such that the CRC field is a valid CRC check field for the complete message. At the destination, unit 30 can be the final user unit, checking the entire message and extracting the data field DATA therefrom; the DATA field does not need to be checked, as the CRC field acts as a check both for the data field DATA alone and the entire message. (Alternatively, the message can be checked by a final switching unit 30 using a standard CRC check circuit 32 (and similarly at intermediate units 30', 30") and the original packet can be checked by another standard CRC check circuit 42 in the final user unit 40.)
摘要翻译： 分组作为数据字段DATA11加上CRC电路13的CRC（循环冗余校验）校验字段CRC12在单元10中发起。该分组具有添加到其中的报头HDR（具有路由信息字段RIF） 单元20，将其转换成用于通过消息网络传输的消息。 通过查找存储有路由子字段的预计算校验子字段（通过从存储的子字段中选择构建的路由信息字段），校验校正字段CCF由单元20中的单元23计算，使得CRC字段是有效的CRC校验 字段的完整消息。 在目的地，单元30可以是最终用户单元，检查整个消息并从中提取数据字段DATA; DATA字段不需要检查，因为CRC字段用作单独的数据字段DATA和整个消息的检查。 （或者，可以使用标准CRC校验电路32（并且类似地在中间单元30'，30“）由最终切换单元30检查消息，并且原始分组可以由另一标准CRC校验电路42检查 最终用户单元40。
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公开(公告)号：US07107585B2
公开(公告)日：2006-09-12
申请号：US10206830
申请日：2002-07-29
CPC分类号： G06F11/3612 , G06F8/447 , G06F11/348
摘要： The present invention relates to a data processing apparatus and method for compiling application code. The data processing apparatus comprises a processor, and a compiler for compiling application code to generate instructions for execution by the processor. Furthermore, a non-invasive trace unit is coupled to the processor for generating, from input signals received from the processor, trace signals indicative of the instructions being executed by the processor. The compiler is then arranged to control the compilation of the application code dependent on the trace signals. The non-invasive nature of the trace unit enables it to generate trace signals that can be used to produce profiling information for use by the compiler without altering the behaviour of the code being executed by the processor, and accordingly provides a significantly improved technique for obtaining profiling information for use in feedback driven optimization compilation techniques.
摘要翻译： 本发明涉及一种用于编译应用代码的数据处理装置和方法。 数据处理装置包括处理器和用于编译应用代码以生成由处理器执行的指令的编译器。 此外，非侵入性跟踪单元耦合到处理器，用于从处理器接收的输入信号中产生指示由处理器执行的指令的跟踪信号。 然后，编译器被安排为依赖于跟踪信号来控制应用代码的编译。 跟踪单元的非侵入性使其能够生成跟踪信号，可以用于产生分析信息供编译器使用，而不会改变由处理器执行的代码的行为，因此提供了一种显着改进的技术来获取 分析信息用于反馈驱动的优化编译技术。
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公开(公告)号：US06425106B1
公开(公告)日：2002-07-23
申请号：US09398488
申请日：1999-09-17
IPC分类号： G06F1110
CPC分类号： H04L1/0061 , H04L1/0065 , H04L1/0072 , H04L1/0083
摘要： A packet is originated in a unit 10 as a data field DATA 11 plus a CRC (cyclic redundancy check) check field CRC 12 by a CRC circuit 13. This packet has a header HDR (with a routing information field RIF) added to it in a unit 20, converting it into a message for transmission through a message network. A check correction field CCF is computed by unit 23 in unit 20, by looking up precomputed check subfields stored with the routing subfields (the routing information field being constructed by selecting from the stored subfields), such that the CRC field is a valid CRC check field for the complete message. At the destination, unit 30 can be the final user unit, checking the entire message and extracting the data field DATA therefrom; the DATA field does not need to be checked, as the CRC field acts as a check both for the data field DATA alone and the entire message. (Alternatively, the message can be checked by a final switching unit 30 using a standard CRC check circuit 32 (and similarly at intermediate units 30′, 30″) and the original packet can be checked by another standard CRC check circuit 42 in the final user unit 40. ).
摘要翻译： 分组作为数据字段DATA11加上CRC电路13的CRC（循环冗余校验）校验字段CRC12在单元10中发起。该分组具有添加到其中的报头HDR（具有路由信息字段RIF） 单元20，将其转换成用于通过消息网络传输的消息。 通过查找存储有路由子字段的预计算校验子字段（通过从存储的子字段中选择构建的路由信息字段），校验校正字段CCF由单元20中的单元23计算，使得CRC字段是有效的CRC校验 字段的完整消息。 在目的地，单元30可以是最终用户单元，检查整个消息并从中提取数据字段DATA; DATA字段不需要检查，因为CRC字段用作单独的数据字段DATA和整个消息的检查。 （或者，可以使用标准CRC校验电路32（并且类似地在中间单元30'，30“）由最终切换单元30检查消息，并且原始分组可以由另一标准CRC校验电路42检查 最终用户单元40）。
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公开(公告)号：US08831341B2
公开(公告)日：2014-09-09
申请号：US13200941
申请日：2011-10-05
申请人： Anthony Neil Berent
发明人： Anthony Neil Berent
CPC分类号： H04N1/644
摘要： An encoding method generates an encoded image according to a predetermined encoding format. The method includes the step of, for each block of pixels, determining an average color of colors of the block of pixels in the predetermined color space; selecting at least one luminance line in dependence on an offset in the color space of the average color from the at least one luminance line; identifying a set of candidate base colors lying on the at least one luminance line; and determining, using the set of candidate base colors and the luminance offset values, the set of encoded pixel colors. The base color and the set of luminance offsets are selected in dependence on an encoding error indicative of a sum distance in the color space between the set of encoded pixel colors and the colors of the block of pixels.
摘要翻译： 编码方法根据预定的编码格式生成编码图像。 该方法包括以下步骤：针对每个像素块，确定预定颜色空间中的像素块的颜色的平均颜色; 根据来自所述至少一个亮度线的所述平均颜色的颜色空间中的偏移来选择至少一个亮度线; 识别位于所述至少一个亮度线上的一组候选基色; 以及使用所述一组候选基色和亮度偏移值来确定编码像素颜色的集合。 根据指示编码像素颜色集合和像素块的颜色之间的颜色空间中的和距离的编码误差来选择基色和亮度偏移集合。
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公开(公告)号：US07110934B2
公开(公告)日：2006-09-19
申请号：US10282225
申请日：2002-10-29
IPC分类号： G06G7/62
CPC分类号： G06F11/3461 , G06F11/3419 , G06F11/3447 , G06F2201/88
摘要： The present invention provides a system and method for controlling a simulator to run a software simulation of a data processing system in order to generate simulated timing data indicative of performance of an unmodelled portion of the data processing system not modelled by the software simulation. The software simulation provides a timing accurate model of those parts of the data processing system other than the unmodelled portion. The method of the invention comprises inputting to a controller of the simulator real trace data obtained from execution of a program by the data processing system, the real trace data identifying the sequence of instructions executed by the data processing system, and associated timing data. The method then involves running the software simulation under the control of the controller, the controller determining from the real trace data the sequence of instructions executed by the data processing system and controlling the software simulation to ensure that the same sequence of instructions is executed within the software simulation. Then simulated timing data is generated resulting from execution of the sequence of instructions within the software simulation, whereby the performance of the unmodelled portion of the data processing system is derivable from a comparison of the real trace data and the simulated timing data. This technique provides a particularly efficient technique for obtaining performance information about a portion of a data processing system which is not modelled within a software simulation.
摘要翻译： 本发明提供了一种用于控制模拟器以运行数据处理系统的软件模拟的系统和方法，以便生成指示未被软件模拟建模的数据处理系统的未建模部分的性能的模拟定时数据。 该软件模拟提供除了未建模部分之外的数据处理系统的那些部分的时序精确模型。 本发明的方法包括向控制器输入由数据处理系统从程序执行获得的实际跟踪数据，识别由数据处理系统执行的指令序列的实际跟踪数据以及相关的定时数据。 该方法随后在控制器的控制下运行软件仿真，控制器根据实际跟踪数据确定由数据处理系统执行的指令序列，并控制软件仿真，以确保在内部执行相同的指令序列 软件模拟。 然后，由软件仿真中的指令序列的执行产生模拟定时数据，由此数据处理系统的未建模部分的性能可以从实际跟踪数据和模拟定时数据的比较中推导出来。 该技术提供了一种特别有效的技术，用于获得关于在软件模拟中未建模的数据处理系统的一部分的性能信息。
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7.发明授权公开(公告)号：US07020768B2
公开(公告)日：2006-03-28
申请号：US09792643
申请日：2001-02-26
申请人： Andrew Brookfield Swaine , Conrado Blasco Allué , Ian Victor Devereux , David James Williamson , Anthony Neil Berent
发明人： Andrew Brookfield Swaine , Conrado Blasco Allué , Ian Victor Devereux , David James Williamson , Anthony Neil Berent
CPC分类号： G06F9/3824 , G06F9/3802 , G06F11/3466 , G06F11/3636
摘要： The present invention provides an apparatus and method for facilitating debugging of sequences of processing instructions. The apparatus comprises a processing circuit for executing processing instructions, the processing circuit having multiple states of operation, with each state of operation being assigned a context identifier to identify the state of operation. Further, logic is provided for facilitating debugging of sequences of processing instructions executed by the processing circuit. The logic comprises control logic, responsive to control parameters, to perform predetermined actions to facilitate debugging, and triggering logic for generating the control parameters dependent on data received from the processing circuit indicative of the processing being performed by the processing circuit. The triggering logic comprises at least one context identifier comparator for comparing a context identifier provided within the data received from the processing circuit with a predetermined context identifier, and to generate a signal indicating whether that context identifier matches the predetermined context identifier. By this approach, the present invention enables a data processing apparatus to be provided with tracing mechanisms and/or debugging mechanisms which can reliably operate even in situations where the sequences of processing instructions from different states of operation occupy overlapping regions in the memory's address space.
摘要翻译： 本发明提供了一种便于调试处理指令序列的装置和方法。 该装置包括用于执行处理指令的处理电路，该处理电路具有多个操作状态，每个操作状态被分配上下文标识符以识别操作状态。 此外，提供逻辑以便于调试由处理电路执行的处理指令的序列。 逻辑包括响应于控制参数的控制逻辑，以执行预定的动作以便于调试，以及触发用于根据从处理电路接收的指示由处理电路执行的处理的数据产生控制参数的逻辑。 触发逻辑包括至少一个上下文标识符比较器，用于将从处理电路接收的数据中提供的上下文标识符与预定上下文标识符进行比较，并产生指示该上下文标识符是否匹配预定上下文标识符的信号。 通过这种方法，本发明使数据处理装置能够提供跟踪机制和/或调试机制，即使在来自不同操作状态的处理指令的序列占据存储器地址空间中的重叠区域的情况下也可以可靠地运行。
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