Approaching vehicle detecting system and approaching vehicle detecting method
    2.
    发明授权
    Approaching vehicle detecting system and approaching vehicle detecting method 有权
    接近车辆检测系统和接近车辆检测方法

    公开(公告)号:US09103903B2

    公开(公告)日:2015-08-11

    申请号:US14111377

    申请日:2012-04-13

    IPC分类号: G01S3/808 G01S11/14

    摘要: An approaching vehicle detecting system that detects an approaching vehicle on the basis of sounds collected by a plurality of sound collectors mounted on a host vehicle determines whether a transverse moving direction of a sound source detected by the plurality of sound collectors is a direction approaching the host vehicle, determines whether a vertical position of the sound source detected using the plurality of sound collectors is in the same plane as that of the host vehicle, and detects that sound source as the approaching vehicle when it is determined that the transverse moving direction of the sound source is the direction approaching the host vehicle and the vertical position of the sound source is in the same plane as that of the host vehicle.

    摘要翻译: 基于由安装在主车辆上的多个收集器收集的声音来检测接近的车辆的接近车辆检测系统确定由多个收集器检测到的声源的横向移动方向是否是接近主机的方向 确定使用多个收集器检测到的声源的垂直位置是否处于与本车辆相同的平面中,并且当确定该声源的横向移动方向时,检测该声源作为接近车辆 声源是接近主车辆的方向,声源的垂直位置在与本车辆相同的平面上。

    SEMICONDUCTOR MEMORY DEVICE AND WRITING METHOD OF ID CODES AND UPPER ADDRESSES
    3.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND WRITING METHOD OF ID CODES AND UPPER ADDRESSES 有权
    半导体存储器件和ID编码和上位地址的写入方法

    公开(公告)号:US20130279253A1

    公开(公告)日:2013-10-24

    申请号:US13619273

    申请日:2012-09-14

    IPC分类号: G11C16/08

    摘要: A semiconductor chip D1 of a flash memory which is stacked together with other semiconductor chips D2˜DN to form a multi-chip package (MCP), including a memory cell array 20 of the flash memory for storing an ID code and an upper address, wherein the ID code is written into the a fuse data region 20F of the memory cell array 20 before the assembly process. According to the invention, ID codes and upper addresses can be assigned and written to each of the semiconductor chips of a multi-chip package easily without increasing the size of the semiconductor chips in comparison with the prior art.

    摘要翻译: 闪存的半导体芯片D1与其他半导体芯片D2〜DN堆叠以形成多芯片封装(MCP),包括用于存储ID代码和高地址的闪速存储器的存储单元阵列20, 其中在组装过程之前将ID代码写入存储单元阵列20的熔丝数据区域20F。 根据本发明,与现有技术相比,可以容易地将ID码和上位地址分配并写入多芯片封装的每个半导体芯片,而不增加半导体芯片的尺寸。

    SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
    5.
    发明申请
    SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME 有权
    半导体器件及其控制方法

    公开(公告)号:US20130155774A1

    公开(公告)日:2013-06-20

    申请号:US13610368

    申请日:2012-09-11

    IPC分类号: G11C16/28

    摘要: The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit connected to a core cell provided in a nonvolatile memory cell array, a second current-voltage conversion circuit connected to a reference cell through a reference cell data line, a sense amplifier sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.

    摘要翻译: 本发明提供一种半导体存储器及其控制方法,所述半导体器件包括连接到设置在非易失性存储单元阵列中的核心单元的第一电流 - 电压转换电路,连接到参考单元的第二电流 - 电压转换电路 参考单元数据线,感测来自第一电流 - 电压转换电路的输出和来自第二电流 - 电压转换电路的输出的读出放大器,将参考单元数据线上的电压电平与预定电压电平进行比较的比较电路 以及如果在对所述参考单元数据线预充电期间所述参考单元数据线处的电压电平低于所述预定电压电平,则对所述参考单元数据线充电的充电电路。 根据本发明,可以缩短参考单元数据线的预充电周期,并且可以缩短数据读取时间。

    NAIL CORRECTING DEVICE AND MEDICAL SET FOR NAIL CORRECTION
    6.
    发明申请
    NAIL CORRECTING DEVICE AND MEDICAL SET FOR NAIL CORRECTION 有权
    指甲矫正装置和医疗套装用于指甲矫正

    公开(公告)号:US20120197172A1

    公开(公告)日:2012-08-02

    申请号:US13361178

    申请日:2012-01-30

    申请人: Akira OGAWA

    发明人: Akira OGAWA

    IPC分类号: A61F5/00

    CPC分类号: A61F5/11 A61K31/00

    摘要: A device includes: a cylindrical body formed of an elastic material; and a slit formed along a longitudinal direction of the cylindrical body from one end to an opposite end of the cylindrical body, a distal end of a nail being inserted to be held in the slit. The cylindrical body includes: plural pairs of holding teeth plurally divided in the longitudinal direction of the cylindrical body by dividing grooves formed from the slit along a circumferential direction of the cylindrical body such that the holding teeth of each pair are opposed to each other across the slit to hold the distal end of the nail; and coupling pieces configured to couple adjacent ones of the holding teeth on an opposite side of the slit.

    摘要翻译: 一种装置包括:由弹性材料形成的圆筒体; 以及沿筒体的长度方向从圆柱体的一端到另一端形成的狭缝,将钉子的前端插入以保持在狭缝中。 圆柱体包括:多个保持齿沿着圆柱体的圆周方向沿圆周方向分隔成多个沿圆柱体的纵向方向分割的多个保持齿,使得每对的保持齿彼此相对 狭缝夹住指甲的远端; 以及联接件,其构造成在狭缝的相对侧上将相邻的保持齿联接。

    Semiconductor device and control method of the same
    7.
    发明授权
    Semiconductor device and control method of the same 有权
    半导体器件及其控制方法相同

    公开(公告)号:US07978523B2

    公开(公告)日:2011-07-12

    申请号:US12512741

    申请日:2009-07-30

    IPC分类号: G11C16/06

    摘要: The present invention provides a semiconductor memory and a control method therefore, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12) provided in a nonvolatile memory cell array (10), a second current-voltage conversion circuit (26) connected to a reference cell (22) through a reference cell data line (24), a sense amplifier (18) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit (28) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit (30) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.

    摘要翻译: 因此,本发明提供一种半导体存储器和控制方法,所述半导体器件包括连接到设置在非易失性存储单元阵列(10)中的核心单元(12)的第一电流 - 电压转换电路(16),第二电流 - 电压转换电路(26),通过参考单元数据线(24)连接到参考单元(22);感测放大器(18),感测来自第一电流 - 电压转换电路的输出和来自第二电流电压 转换电路,将参考单元数据线上的电压电平与预定电压电平进行比较的比较电路(28)以及对参考单元数据线充电的充电电路(30),如果参考单元数据线上的电压电平为 在预充电参考单元数据线期间低于预定电压电平。 根据本发明,可以缩短参考单元数据线的预充电周期,并且可以缩短数据读取时间。

    Image forming device, image forming method, image forming program, and recording medium
    8.
    发明授权
    Image forming device, image forming method, image forming program, and recording medium 有权
    图像形成装置,图像形成方法,图像形成程序和记录介质

    公开(公告)号:US07898676B2

    公开(公告)日:2011-03-01

    申请号:US11633017

    申请日:2006-12-04

    IPC分类号: G06K15/00 G06F3/12 G03G15/00

    摘要: An image forming device comprises a tray parameter table in which tray IDs for identifying one or trays of the image forming device and tray parameters for the respective tray IDs are stored in a mutually associated manner. A replacing unit receives an input tray ID and an input tray change parameter specified by an externally supplied printer control protocol, and replaces a tray parameter contained in the tray parameter table and corresponding to a tray ID which is the same as the input tray ID, by the input tray change parameter.

    摘要翻译: 图像形成装置包括托盘参数表,其中以相互关联的方式存储用于识别图像形成装置的一个或托盘的托盘ID和用于各个托盘ID的托盘参数。 替换单元接收由外部提供的打印机控制协议指定的输入托盘ID和输入托盘改变参数,并且替换托盘参数表中包含的托盘参数并对应于与输入托盘ID相同的托盘ID, 通过进纸盘更改参数。

    SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
    9.
    发明申请
    SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME 有权
    半导体器件及其控制方法

    公开(公告)号:US20090290425A1

    公开(公告)日:2009-11-26

    申请号:US12512741

    申请日:2009-07-30

    IPC分类号: G11C16/06 G11C7/06

    摘要: The present invention provides a semiconductor memory and a control method therefore, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12) provided in a nonvolatile memory cell array (10), a second current-voltage conversion circuit (26) connected to a reference cell (22) through a reference cell data line (24), a sense amplifier (18) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit (28) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit (30) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.

    摘要翻译: 因此,本发明提供一种半导体存储器和控制方法,所述半导体器件包括连接到设置在非易失性存储单元阵列(10)中的核心单元(12)的第一电流 - 电压转换电路(16),第二电流 - 电压转换电路(26),通过参考单元数据线(24)连接到参考单元(22);感测放大器(18),感测来自第一电流 - 电压转换电路的输出和来自第二电流电压 转换电路,将参考单元数据线上的电压电平与预定电压电平进行比较的比较电路(28)以及对参考单元数据线充电的充电电路(30),如果参考单元数据线上的电压电平为 在预充电参考单元数据线期间低于预定电压电平。 根据本发明,可以缩短参考单元数据线的预充电周期,并且可以缩短数据读取时间。

    Semiconductor device and control method therefor
    10.
    发明授权
    Semiconductor device and control method therefor 有权
    半导体装置及其控制方法

    公开(公告)号:US07596032B2

    公开(公告)日:2009-09-29

    申请号:US11478554

    申请日:2006-06-28

    IPC分类号: G11C16/06

    摘要: The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12) provided in a nonvolatile memory cell array (10), a second current-voltage conversion circuit (26) connected to a reference cell (22) through a reference cell data line (24), a sense amplifier (18) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit (28) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit (30) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.

    摘要翻译: 本发明提供一种半导体存储器及其控制方法,所述半导体器件包括连接到设置在非易失性存储单元阵列(10)中的核心单元(12)的第一电流 - 电压转换电路(16),第二电流 - 电压转换电路(26),通过参考单元数据线(24)连接到参考单元(22);感测放大器(18),感测来自第一电流 - 电压转换电路的输出和来自第二电流电压 转换电路,将参考单元数据线上的电压电平与预定电压电平进行比较的比较电路(28)以及对参考单元数据线充电的充电电路(30),如果参考单元数据线上的电压电平为 在预充电参考单元数据线期间低于预定电压电平。 根据本发明,可以缩短参考单元数据线的预充电周期,并且可以缩短数据读取时间。