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    SEMICONDUCTOR MEMORY DEVICES
    9.
    发明公开
    SEMICONDUCTOR MEMORY DEVICES 审中-公开

    公开(公告)号：US20240179888A1

    公开(公告)日：2024-05-30

    申请号：US18492093

    申请日：2023-10-23

    申请人： Samsung Electronics Co., Ltd.

    发明人： Jaecheon YONG ,  Daehong KO

    IPC分类号： H10B12/00

    CPC分类号： H10B12/30 ,  H10B12/03 ,  H10B12/05

    摘要： A semiconductor memory device includes a source layer, a semiconductor layer including a semiconductor protrusion structure, and a drain layer arranged in a first horizontal direction on a substrate, a cell capacitor extending in the first horizontal direction on the substrate and including a lower electrode layer, a capacitor dielectric film, and an upper electrode layer connected to the drain layer, a bit line extending in a vertical direction on the substrate and connected to the source layer, and a gate structure covering the semiconductor protrusion structure and including a gate dielectric film on the semiconductor protrusion structure and a gate electrode film on the gate dielectric film. A value of a first thickness of an end portion of the semiconductor protrusion structure facing the drain layer is greater than a value of a second thickness of another end portion of the semiconductor protrusion structure facing the source layer.

    MEMORY CONTROLLERS AND MEMORY SYSTEMS INCLUDING THE SAME
    10.
    发明公开
    MEMORY CONTROLLERS AND MEMORY SYSTEMS INCLUDING THE SAME 审中-公开

    公开(公告)号：US20240170089A1

    公开(公告)日：2024-05-23

    申请号：US18351709

    申请日：2023-07-13

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Sungwoo Chung ,  Hyeongkon Bae ,  Myungjae Chung

    IPC分类号： G11C29/52 ,  G11C11/408

    CPC分类号： G11C29/52 ,  G11C11/4087

    摘要： A memory controller that controls a memory module including a plurality of memory chips, the memory controller including an error correction circuit including an encoding circuit and a processor to control the error correction circuit. The encoding circuit, in a write operation, divides a user data set into data units, generates data flags indicating types of the data units, generates data parities based on the data units, generates flag parities based on the data flags, generates an encoded user data set by using at least one null data unit in which all or half of included data bits are zero, as a data duplication space for duplicating a valid data unit, generates a codeword set by interleaving the encoded user data set, the data parities, the data flags, the flag parities and a null bit bit-wisely, and transmits the codeword set to the memory module.