公开(公告)号：US20240170089A1

公开(公告)日：2024-05-23

申请号：US18351709

申请日：2023-07-13

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Sungwoo Chung ,  Hyeongkon Bae ,  Myungjae Chung

IPC分类号： G11C29/52 ,  G11C11/408

CPC分类号： G11C29/52 ,  G11C11/4087

摘要： A memory controller that controls a memory module including a plurality of memory chips, the memory controller including an error correction circuit including an encoding circuit and a processor to control the error correction circuit. The encoding circuit, in a write operation, divides a user data set into data units, generates data flags indicating types of the data units, generates data parities based on the data units, generates flag parities based on the data flags, generates an encoded user data set by using at least one null data unit in which all or half of included data bits are zero, as a data duplication space for duplicating a valid data unit, generates a codeword set by interleaving the encoded user data set, the data parities, the data flags, the flag parities and a null bit bit-wisely, and transmits the codeword set to the memory module.