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公开(公告)号：US20240088878A1
公开(公告)日：2024-03-14
申请号：US18512158
申请日：2023-11-17
CPC分类号： H03K4/08 , H03F3/2173 , H03L7/081 , H03L7/0891 , H03L7/099 , H03F2200/03 , H03K19/20
摘要： In one example, an apparatus comprises a power stage having a first power stage input, a second power stage input, and a power stage output. The apparatus also comprises a modulator circuit having a first ramp input, a second ramp input, a modulator input, a first modulator output, and a second modulator output, the first modulator output coupled to the first power stage input, and the second modulator output coupled to the second power stage input. The apparatus also comprises a multi-level ramp generator having a first ramp output and a second ramp output, the first ramp output coupled to the first ramp input, and the second ramp output coupled the second ramp input.
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公开(公告)号：US11888482B2
公开(公告)日：2024-01-30
申请号：US17565110
申请日：2021-12-29
摘要： A system comprises a first comparator, a second comparator, a pulse-width modulation (PWM) controller, and a ramp generator. The first comparator has a positive input coupled to a first ramp output of the ramp generator and a negative input configured to receive an input voltage. The second comparator has a positive input configured to receive the input voltage and a negative input coupled to a second ramp output of the ramp generator. The PWM controller is coupled to outputs and control signal inputs of the first and second comparators and has a control output. In some implementations, the ramp generator generates a high-side falling ramp for the first comparator and a low-side rising ramp for the second comparator. In some implementations, the ramp generator includes a first ramp generator for the high-side falling ramp and a second ramp for the low-side rising ramp.
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公开(公告)号：US11824543B2
公开(公告)日：2023-11-21
申请号：US17832280
申请日：2022-06-03
CPC分类号： H03K4/08 , H03F3/2173 , H03L7/081 , H03L7/0891 , H03L7/099 , H03F2200/03 , H03K19/20
摘要： A device includes a first ramp generator having a first ramp generator output configured to provide a first ramp, a second ramp generator having a second ramp generator output configured to provide a second ramp, and a third ramp generator having a third ramp generator output configured to provide a third ramp. The first ramp is a sawtooth voltage waveform having a first common mode voltage and a first peak-to-peak voltage. The second ramp is a sawtooth voltage waveform having a second common mode voltage and a second peak-to-peak voltage. The third ramp is a sawtooth voltage waveform having a third common mode voltage and a third peak-to-peak voltage. A frequency of the second ramp is approximately equal to a frequency of the third ramp, and the frequency of the third ramp is approximately double a frequency of the first ramp.
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公开(公告)号：US20190123731A1
公开(公告)日：2019-04-25
申请号：US16151380
申请日：2018-10-04
发明人： Edoardo Botti , Noemi Gallo
CPC分类号： H03K7/08 , H03F1/26 , H03F3/181 , H03F3/217 , H03F2200/03 , H03K4/08 , H03K5/1252
摘要： In an embodiment, a PWM modulation circuit includes a first circuit block configured to receive a square wave input signal and produce from the square wave input signal a triangular wave signal, a second circuit block configured to receive a modulating signal and produce a PWM signal by comparing the modulating signal with a carrier signal, a switching circuit block coupled between the first circuit block and the second circuit block and sensitive to reference signals having upper and lower reference values and selectively switchable between a carrier transfer setting in which the switching circuit block couples the first circuit block to the second circuit block to transfer the triangular wave signal as the carrier signal, and one or more carrier forcing settings for optimizing or inhibiting pulse skipping in the PWM signal, wherein the switching circuit block forces the carrier signal to the upper and lower reference values, respectively.
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公开(公告)号：US20190123725A1
公开(公告)日：2019-04-25
申请号：US15791026
申请日：2017-10-23
发明人： Paul VULPOIU , Rakesh RAJA , Sudhir NAGARAJ
摘要： An analog signal-to-pulse width modulation (PWM) converter includes a ramp generator generating a ramp signal and a comparator circuit comparing the ramp signal to a first voltage, a second voltage, and an analog input signal. A duty cycle calculation circuit generates a first control signal to the ramp generator to generate the ramp signal. Based on signals from the comparator circuit, the duty cycle calculation circuit calculates the ratio of the time it takes for the ramp signal to exceed the analog input signal from when the ramp signal exceeds the first voltage to the time it takes for the ramp signal to exceed the second voltage from when the ramp signal exceeds the first voltage. A PWM signal generator generates a PWM output signal based on the ratio calculated by the duty cycle calculation circuit.
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公开(公告)号：US20190068074A1
公开(公告)日：2019-02-28
申请号：US16103860
申请日：2018-08-14
发明人： Lin Feng
CPC分类号： H02M7/217 , H02M1/08 , H02M3/33507 , H02M2001/0048 , H03K3/037 , H03K4/08 , H03K17/063 , H03K19/20 , H03K2217/0063 , H03K2217/0081
摘要： A supply voltage generating circuit for generating a supply voltage signal to supply the active elements of an AC-DC voltage converter. The supply voltage generating circuit has a charging switch, a charging diode and a charging capacitor. When a main switch of the AC-DC voltage converter is turned on, the charging switch is turned on. Primary current flows through the charging switch and the main switch to the logic ground. When the main switch is turned off and the voltage across the charging capacitor is smaller than a charging threshold, the charging switch is kept on for a period of time and the primary current flows through the charging switch and the charging diode to the charging capacitor. When the period of time is expired or the supply voltage signal is larger than the charging threshold signal, the charging switch is turned off.
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公开(公告)号：US20180287595A1
公开(公告)日：2018-10-04
申请号：US15801137
申请日：2017-11-01
发明人： Byeong Hak JO , Jeong Hoon KIM , Hyun PAEK , Jong Ok HA
CPC分类号： H03K5/1252 , H02M1/44 , H02M3/07 , H02M2001/0045 , H02M2003/071 , H03F1/0261 , H03F3/19 , H03F3/21 , H03F3/245 , H03F2200/105 , H03F2200/339 , H03F2200/351 , H03F2200/451 , H03K3/0315 , H03K3/354 , H03K3/84 , H03K4/08 , H03K7/08 , H03K17/28
摘要： A power amplifying apparatus includes a power circuit configured to generate operating power, a random pulse generation circuit configured to be supplied with the operating power and to generate a pulse width modulation signal of which a pulse width is randomly changed over time using an input radio frequency (RF) signal, and a charge pump circuit configured to be supplied with the operating power and to randomly perform a switching operation according to the pulse width modulation signal to generate a negative voltage.
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公开(公告)号：US20170353160A1
公开(公告)日：2017-12-07
申请号：US15401628
申请日：2017-01-09
发明人： Hui Dong GWON , Gyu Hyeong CHO , Jeong Hoon KIM
CPC分类号： H03F1/02 , H03F1/0227 , H03F3/189 , H03F3/19 , H03F3/20 , H03F3/245 , H03F2200/102 , H03F2200/471 , H03K3/017 , H03K4/08
摘要： A multiphase power supply includes a multiphase converter including first and second converters having differing operating phases, each of the first and second converters configured to convert input power into driving power, and transmit the driving power to a power amplifier, a detector configured to detect a voltage based on the driving power, and a duty controller configured to compare an error voltage between an envelope signal of an input signal input into the power amplifier and the detected voltage and sawtooth wave signals having different phases from each other to generate duty control signals, wherein the duty controller compares the error voltage and the sawtooth wave signals with each other using a single comparator.
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公开(公告)号：US09762217B2
公开(公告)日：2017-09-12
申请号：US14888335
申请日：2013-07-15
发明人： Dongmei Li , Qing Luo , Shengfa Liang , Hongzhang Yang , Xiaojing Li , Hao Zhang , Changqing Xie , Ming Liu
摘要： A sampler adapted to a one-dimension slow-varying signal, including: a signal preprocessing unit configured to preprocess an input signal; a slope-controllable sawtooth wave signal generating unit configured to generate a slope-controllable sawtooth wave signal and perform zero-resetting; a signal comparing unit configured to compare the preprocessed input signal from the signal preprocessing unit with the sawtooth wave signal and to output a pulse signal to the generating unit and a signal outputting unit when the preprocessed input signal is equal to the sawtooth wave signal; a counting unit configured to count a number of clock signals while the sawtooth wave signal generating unit is generating the sawtooth wave signal and to transmit the counted number to the signal outputting unit; the signal outputting unit configured to, upon receipt of the pulse signal output from the signal comparing unit, output the number counted by the counting unit at the moment.
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公开(公告)号：US20170206296A1
公开(公告)日：2017-07-20
申请号：US15408758
申请日：2017-01-18
发明人： Gerrit MEYER
IPC分类号： G06F17/50
CPC分类号： G06F17/5036 , G05B17/02 , G05B2219/23446 , H03K4/06 , H03K4/08
摘要： A simulation device for simulating a peripheral circuit arrangement that can be connected to a control device, wherein the simulation device can be electrically connected to the control device, and the simulation device has a first control element for influencing a first simulation current that can be passed from a first load terminal of the control device to a first control element output of the first control element. The first control element contains a first multistage converter that includes a first converter output, which is electrically connected to a terminal on the converter side of a first inductive component at whose terminal on the control device side the first control element output is implemented. A direction of flow of the first simulation current is reversible, and the simulation device also includes a computing unit for execution of model code.
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