公开(公告)号：US08487653B2

公开(公告)日：2013-07-16

申请号：US12422719

申请日：2009-04-13

Applicant: Min Ming Tarng ,  Mei Jech Lin ,  Eric Yu-Shiao Tarng ,  Alfred Yu-Chi Tarng ,  Angela Yu-Shiu Tarng ,  Jwu-Ing Tarng ,  Huang-Chang Tarng ,  Shun-Yu Nieh

Inventor： Min Ming Tarng ,  Mei Jech Lin ,  Eric Yu-Shiao Tarng ,  Alfred Yu-Chi Tarng ,  Angela Yu-Shiu Tarng ,  Jwu-Ing Tarng ,  Huang-Chang Tarng ,  Shun-Yu Nieh

IPC: H03K19/177 ,  H01L25/00

CPC classification number: H03B5/04 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/124 ,  H03B5/1253 ,  H03B5/1278 ,  H03B5/366 ,  H03L1/00 ,  H03L1/022 ,  H03L1/026 ,  H03L7/00 ,  H03L7/08

Abstract: The Anlinx™:LVLP Hybrid Analogic Field Programmable Array of Milinx™:Mixed Signal FPSC™ Field Programmable System Chip™ is constituted of Field Programmable Hybrid Array (FPHA and Frequency Programmable Xtaless Clock (FPXC) being for high-speed and high frequency System-Design-On-Chip(SDOC) embedded in a single chip of Field Programmable System Chip(FPSC™). The FPXC adopts the Self-Adaptive Process & Temperature Compensation Bandgap Reference Generator, the Gain-Boost Amplitude Control LC VCO and inverter type flash memory. The FPHA adopts the two-way flash switch and inverter type flash memory Look-Up-Table(LUT). The FPXC adopts the inverter type flash memory as the Non-Volatile Memory(NVM) to keep the setup data in the field frequency programming. The flash technology of FPHA and FPXC are compatible that the FPHA has the FPXC capability. The PLLess CDR(PLL free Clock Data Recovery) is based on the FPXC capability for the SerDes high frequency application. The PLLess CDR and pipeline ADC are for the analog front high frequency application. With the SDOC on FPHA, the Automobile Infotainment Center(MIC) is reduced to be Mobile Infotainment Center(MIC). The (1) Capacitorless Low Drop Voltage (Capless LDVR) (2) Inductor less Switch Mode Power Supply (Indless SMPS) (3) Resistorless Current Sensor (Resless CS), (4) Saw Filter Less Low Noise Amplifier(Sawless LNA), (5) Diode Less True Random Number Generator (Dioless TRNG), (6) Crystal Less Clock (Xtaless Clock), (7) PLL Less Clock and Data Recovery (PLLess CDR) and (8) Filmless Touching Screen (FLTS) constitutes the most advanced System Design On Chip (SDOC) on Field Programmable Hybrid Array (FPHA) for Mobile Infotainment Center (MIC).

公开(公告)号：US20130147563A1

公开(公告)日：2013-06-13

申请号：US13635006

申请日：2010-06-29

Applicant: Lionel Geynet ,  Jean-Stephane Vigier

Inventor： Lionel Geynet ,  Jean-Stephane Vigier

IPC: H03L7/00

CPC classification number: H03L7/00 ,  H03B5/04 ,  H03B5/124 ,  H03L1/00 ,  H03L1/023 ,  H03L7/099 ,  H03L7/10

Abstract: An integrated circuit device comprises tuning signal circuitry for generating a tuning signal for calibrating a voltage controlled oscillator (VCO). The tuning signal circuitry is arranged to receive a target voltage signal that is representative of a target voltage across at least one passive element within a resonant tank circuit of a VCO that is being calibrated, generate a VCO simulation signal representative of an average voltage difference across at least one active component of the VCO that is being calibrated, and output a tuning signal based at least partly on the received target voltage signal and the generated VCO simulation signal.

Abstract translation: 集成电路器件包括用于产生用于校准压控振荡器（VCO）的调谐信号的调谐信号电路。 调谐信号电路被布置成接收代表被校准的VCO的谐振回路内的至少一个无源元件上的目标电压的目标电压信号，产生代表跨越的VCO的平均电压差的VCO模拟信号 被校准的VCO的至少一个有源分量，并且至少部分地基于所接收的目标电压信号和所生成的VCO模拟信号来输出调谐信号。

公开(公告)号：US20130106476A1

公开(公告)日：2013-05-02

申请号：US13283843

申请日：2011-10-28

Applicant: CYRIL JOUBERT ,  SEBASTIEN RIEUBON

Inventor： CYRIL JOUBERT ,  SEBASTIEN RIEUBON

IPC: H03L7/06

CPC classification number: H03L1/00 ,  H03J2200/10 ,  H03L1/023 ,  H03L1/025 ,  H03L7/099 ,  H03L2207/06

Abstract: A method and apparatus for compensating for temperature variation in a phase locked loop (PLL) includes receiving an error signal by a controller in which the error signal representative of an instantaneous frequency difference between a reference frequency signal and an output frequency signal of a voltage controlled oscillator of the PLL, and determining when a voltage of the error signal is outside of a predetermined voltage range. When the voltage is outside the predetermined voltage range, the method includes generating a new digital compensation signal based upon a previous digital compensation signal, and converting the new digital compensation signal to be an analog compensation signal. The method further includes filtering the analog compensation signal by a filter to produce a filtered analog compensation signal, and adjusting the output frequency of the voltage controlled oscillator in accordance with the filtered analog compensation signal.

Abstract translation: 用于补偿锁相环（PLL）中的温度变化的方法和装置包括通过控制器接收误差信号，其中，该误差信号表示参考频率信号和电压控制的输出频率信号之间的瞬时频率差 PLL的振荡器，并且确定误差信号的电压何时超出预定电压范围。 当电压超出预定电压范围时，该方法包括基于先前的数字补偿信号产生新的数字补偿信号，并将新的数字补偿信号转换为模拟补偿信号。 该方法还包括通过滤波器对模拟补偿信号进行滤波以产生经滤波的模拟补偿信号，以及根据经滤波的模拟补偿信号调整压控振荡器的输出频率。

公开(公告)号：US20130012141A1

公开(公告)日：2013-01-10

申请号：US13176509

申请日：2011-07-05

Applicant: David Harnishfeger

Inventor： David Harnishfeger

IPC: H04W88/02 ,  H03C3/12

CPC classification number: H03L1/00 ,  H03J3/04 ,  H03L1/023 ,  H03L1/025 ,  H03L1/028

Abstract: In embodiments of the present disclosure, a method may include determining an ambient temperature of an oscillator. The method may also include estimating an approximate frequency of operation of the oscillator. The method may additional include determining a process-based compensation to be applied to a resonator of the oscillator based on the approximate frequency. The method may further include setting a capacitance of a variable capacitor coupled to the resonator in order to compensate for temperature-dependent and process-dependent frequency variation of the oscillator based on the ambient temperature and the process-based compensation.

Abstract translation: 在本公开的实施例中，方法可以包括确定振荡器的环境温度。 该方法还可以包括估计振荡器的近似操作频率。 该方法可以包括基于近似频率来确定要应用于振荡器的谐振器的基于过程的补偿。 该方法还可以包括设置耦合到谐振器的可变电容器的电容，以便基于环境温度和基于过程的补偿来补偿振荡器的温度依赖性和过程相关的频率变化。

公开(公告)号：US20120299663A1

公开(公告)日：2012-11-29

申请号：US13571114

申请日：2012-08-09

Applicant: Tsukasa OISHI ,  Katsuyoshi Mitsui ,  Naoki Otani

Inventor： Tsukasa OISHI ,  Katsuyoshi Mitsui ,  Naoki Otani

IPC: H03L7/099

CPC classification number: H03B5/04 ,  H03L1/00 ,  H03L1/026

Abstract: A semiconductor device contrived to prevent a reference voltage and a reference current which are supplied to a high speed OCO from varying with a change in ambient temperature and/or a change in an external power supply voltage and to reduce the circuit area of a power supply module. The high speed OCO outputs a high speed clock whose magnitude is determined by the reference current and the reference voltage. A logic unit adjusts the values of the reference current and reference voltage, according to the reference voltage and reference current trimming codes related to detected ambient temperature and operating voltage.

Abstract translation: 设计用于防止提供给高速OCO的参考电压和参考电流随着环境温度的变化和/或外部电源电压的变化而变化并减小电源的电路面积的半导体器件 模块。 高速OCO输出高速时钟，其大小由参考电流和参考电压决定。 逻辑单元根据与检测到的环境温度和工作电压相关的参考电压和参考电流调整代码来调整参考电流和参考电压的值。

公开(公告)号：US20120161828A1

公开(公告)日：2012-06-28

申请号：US13093396

申请日：2011-04-25

Applicant: Feng-Hsin Cho ,  Kuo-Lin Chuang

Inventor： Feng-Hsin Cho ,  Kuo-Lin Chuang

IPC: H03L7/06

CPC classification number: H03L1/00 ,  H03L7/00 ,  H03L7/0995

Abstract: A clock generation circuit is provided, having a bandgap reference circuit, a frequency controlled resistor, a comparison circuit and a voltage controlled oscillator. The bandgap reference circuit generates a first voltage. The frequency controlled resistor is coupled to a first node to provide a second voltage. The comparison circuit generates a first current according to a difference between the first voltage and the second voltage. The voltage controlled oscillator outputs first, second and third output clocks according to a third voltage on a second node, wherein the third voltage is generated according to the first current, and the second and third output clocks are fed back to the frequency controlled resistor such that the frequency controlled resistor converts the first current into the second voltage according to the second and third output clocks.

Abstract translation: 提供了具有带隙参考电路，频率控制电阻器，比较电路和压控振荡器的时钟发生电路。 带隙基准电路产生第一电压。 频率控制电阻器耦合到第一节点以提供第二电压。 比较电路根据第一电压和第二电压之间的差产生第一电流。 压控振荡器根据第二节点上的第三电压输出第一，第二和第三输出时钟，其中根据第一电流产生第三电压，并且将第二和第三输出时钟反馈到频率控制电阻器 频率控制电阻器根据第二和第三输出时钟将第一电流转换成第二电压。

公开(公告)号：US20120126902A1

公开(公告)日：2012-05-24

申请号：US13058614

申请日：2009-08-06

Applicant: Jean-Pierre Simondin

Inventor： Jean-Pierre Simondin

IPC: G01R23/00

CPC classification number: H03L1/00 ,  G06F1/04 ,  H03L7/00 ,  H04W52/029 ,  Y02D70/1226 ,  Y02D70/26

Abstract: A precise, low-consumption low-frequency oscillator includes a low-consumption low-frequency oscillator, operating at a frequency FA, a temperature-compensated oscillator B used as frequency standard, operating at a frequency FB, and a circuit for supplying a stable frequency Fcorr.

Abstract translation: 一种精确的，低功耗的低频振荡器包括以频率FA工作的低功耗低频振荡器，用作频率标准的温度补偿振荡器B，以频率FB工作，以及用于提供稳定的 频率Fcorr。

公开(公告)号：US20120074993A1

公开(公告)日：2012-03-29

申请号：US13273231

申请日：2011-10-14

Applicant: Yen-Horng Chen ,  Augusto Marques ,  Caiyi Wang

Inventor： Yen-Horng Chen ,  Augusto Marques ,  Caiyi Wang

IPC: H03L7/08

CPC classification number: H03L7/099 ,  H03L1/00 ,  H03L1/02 ,  H03L2207/06 ,  H03L2207/50

Abstract: An integrated circuit device includes at least one controllable oscillator including a first control port and at least one further control port, at least one frequency control module including an output arranged to provide a frequency control signal. The at least one controllable oscillator further includes at least one compensation module including an output arranged to provide at least one compensation signal. The at least one compensation module includes an integrator component arranged to receive at an input thereof a signal that is representative of a difference between the indication of the frequency control signal and a reference signal, and to output an integrated difference signal. The at least one compensation module is arranged to generate the at least one compensation signal based at least partly on the integrated difference signal output by the integrator component.

Abstract translation: 集成电路装置包括至少一个包括第一控制端口和至少一个另外的控制端口的可控振荡器，至少一个频率控制模块，其包括布置成提供频率控制信号的输出。 所述至少一个可控振荡器还包括至少一个补偿模块，该补偿模块包括布置成提供至少一个补偿信号的输出。 所述至少一个补偿模块包括积分器部件，其被布置为在其输入处接收表示所述频率控制信号的指示与参考信号之间的差异的信号，并输出积分差分信号。 至少一个补偿模块被布置成至少部分地基于由积分器组件输出的积分差分信号来产生至少一个补偿信号。

公开(公告)号：US20120069245A1

公开(公告)日：2012-03-22

申请号：US12887748

申请日：2010-09-22

Applicant: Lakhbir Singh Gandhi ,  Mark Champion ,  Joel Sandgathe

Inventor： Lakhbir Singh Gandhi ,  Mark Champion ,  Joel Sandgathe

IPC: H03L7/00 ,  H03M1/12

CPC classification number: H03M1/1255 ,  G09G5/008 ,  H03L1/00 ,  H04N5/04 ,  H04N5/08

Abstract: A phase for an analog-to-digital converter sampling clock is determined. The analog-to-digital converter samples a video signal to generate pixel values. Differences of successive pixel values are compared to a threshold. The number of times the threshold is exceeded is counted for multiple phase values to create a phase profile. The threshold may be dynamic.

Abstract translation: 确定模数转换器采样时钟的相位。 模数转换器对视频信号进行采样以产生像素值。 将连续像素值的差异与阈值进行比较。 对于多个相位值计算阈值超过的次数，以创建相位曲线。 阈值可能是动态的。

公开(公告)号：US20120056687A1

公开(公告)日：2012-03-08

申请号：US13222177

申请日：2011-08-31

Applicant: Ka-Un Chan ,  Yung-Ming Chiu

Inventor： Ka-Un Chan ,  Yung-Ming Chiu

IPC: H03L1/00

CPC classification number: H03L7/099 ,  H03L1/00

Abstract: A voltage control oscillator implemented in an integrated circuit includes a supply circuit and an oscillating circuit. The supply circuit, implemented with an input/output (I/O) interface element, receives an I/O reference voltage signal and provides a power signal accordingly. The oscillating circuit, implemented with a core circuit element, provides an oscillation signal in response to the power signal. A swing of the oscillation signal is determined according to a level of an I/O reference voltage signal.

Abstract translation: 在集成电路中实现的电压控制振荡器包括电源电路和振荡电路。 由输入/输出（I / O）接口元件实现的供电电路接收I / O参考电压信号并相应地提供功率信号。 用核心电路元件实现的振荡电路响应于功率信号提供振荡信号。 根据I / O参考电压信号的电平来确定振荡信号的摆幅。