公开(公告)号：US07067861B1

公开(公告)日：2006-06-27

申请号：US09652994

申请日：2000-08-31

Applicant: Vishnu K. Agarwal

Inventor： Vishnu K. Agarwal

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: H01L28/75 ,  H01L27/1085 ,  H01L28/40

Abstract: In a semiconductor device including a first conductive layer, the first conductive layer is treated with a nitrogen/hydrogen plasma before an additional layer is deposited thereover. The treatment stuffs the surface with nitrogen, thereby preventing oxygen from being adsorbed onto the surface of the first conductive layer. In one embodiment, a second conductive layer is deposited onto the first conductive layer, and the plasma treatment lessens if not eliminates an oxide formed between the two layers as a result of subsequent thermal treatments. In another embodiment, a dielectric layer is deposited onto the first conductive layer, and the plasma treatment lessens if not eliminates the ability of the first conductive layer to incorporate oxygen from the dielectric.

公开(公告)号：US07015527B2

公开(公告)日：2006-03-21

申请号：US10688678

申请日：2003-10-17

Applicant: Sam Yang ,  Vishnu K. Agarwal

Inventor： Sam Yang ,  Vishnu K. Agarwal

IPC: H01L27/08

CPC classification number: H01L28/56 ,  H01L27/10852 ,  H01L28/75

Abstract: Capacitor structures for use in integrated circuits and methods of their manufacture. The capacitor structures include a bottom electrode, a top electrode and a dielectric layer interposed between the bottom electrode and the top electrode. The capacitor structures further include a metal oxynitride barrier layer interposed between the dielectric layer and at least one of the bottom and top electrodes. Each metal oxynitride barrier layer acts to reduce undesirable oxidation of its associated electrode. Each metal oxynitride barrier layer can further aid in the repairing of oxygen vacancies in a metal oxide dielectric. The capacitors are suited for use as memory cells and apparatus incorporating such memory cells, as well as other integrated circuits.

公开(公告)号：US06995419B2

公开(公告)日：2006-02-07

申请号：US11027263

申请日：2004-12-30

Applicant: Vishnu K. Agarwal ,  Garo J. Derderian

Inventor： Vishnu K. Agarwal ,  Garo J. Derderian

IPC: H01L27/108 ,  H01L21/8242

CPC classification number: H01L28/56 ,  H01L21/02197 ,  H01L21/31637

Abstract: The invention includes semiconductor constructions. In one implementation, semiconductor construction includes a first conductive material. A first layer of a dielectric material is over the first conductive material. A second layer of the dielectric material is on the first layer. A second conductive material is over the second layer of the dielectric material. A construction in accordance with an implementation of the invention can include a pair of capacitor electrodes having capacitor dielectric material therebetween comprising a composite of two immediately juxtaposed and contacting, yet discrete, layers of the same capacitor dielectric material.

Abstract translation: 本发明包括半导体结构。 在一个实施方案中，半导体结构包括第一导电材料。 介电材料的第一层在第一导电材料之上。 电介质材料的第二层在第一层上。 第二导电材料在电介质材料的第二层之上。 根据本发明的实施方案的结构可以包括一对电容器电极，其间具有电容器电介质材料，它们包括相同电容器电介质材料的两个立即并置和接触但离散的层的复合材料。

公开(公告)号：US06972452B2

公开(公告)日：2005-12-06

申请号：US10805118

申请日：2004-03-19

Applicant: Vishnu K. Agarwal

Inventor： Vishnu K. Agarwal

IPC: H01L21/02 ,  H01L21/8242 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: H01L28/75 ,  H01L27/1085 ,  H01L28/40

Abstract: In a semiconductor device including a first conductive layer, the first conductive layer is treated with a nitrogen/hydrogen plasma before an additional layer is deposited thereover. The treatment stuffs the surface with nitrogen, thereby preventing oxygen from being adsorbed onto the surface of the first conductive layer. In one embodiment, a second conductive layer is deposited onto the first conductive layer, and the plasma treatment lessens if not eliminates an oxide formed between the two layers as a result of subsequent thermal treatments. In another embodiment, a dielectric layer is deposited onto the first conductive layer, and the plasma treatment lessens if not eliminates the ability of the first conductive layer to incorporate oxygen from the dielectric.

Abstract translation: 在包括第一导电层的半导体器件中，在其上沉积另外的层之前，用氮/氢等离子体处理第一导电层。 处理用氮气填充表面，从而防止氧被吸附到第一导电层的表面上。 在一个实施例中，第二导电层沉积到第一导电层上，并且如果不消除由于随后的热处理而在两层之间形成的氧化物，则等离子体处理减少。 在另一个实施例中，介电层沉积到第一导电层上，如果不消除第一导电层从电介质中掺入氧的能力，则等离子体处理减少。

公开(公告)号：US06930041B2

公开(公告)日：2005-08-16

申请号：US10435048

申请日：2003-05-12

Applicant: Vishnu K. Agarwal

Inventor： Vishnu K. Agarwal

IPC: C23C16/00 ,  C23C16/452 ,  C23C16/48 ,  H01J37/32 ,  H01L21/00 ,  H01L21/20 ,  H01L21/26 ,  H01L21/31 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/314 ,  H01L21/324 ,  H01L21/42 ,  H01L21/44 ,  H01L21/469 ,  H01L21/477

CPC classification number: H01L21/02274 ,  C23C16/452 ,  C23C16/482 ,  H01J37/32339 ,  H01J37/32357 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/28556 ,  H01L21/3105 ,  H01L21/31051 ,  H01L21/31138 ,  H01L21/314 ,  H01L21/67069 ,  H01L21/76864

Abstract: The present invention provides a processing system comprising a remote plasma activation region for formation of active gas species, a transparent transfer tube coupled between the remote activation region and a semiconductor processing chamber, and a source of photo-energy for maintaining activation of the active species or providing photo-energy for a non-plasma species during transfer through the transparent tube to the processing chamber. The source of photo-energy preferably includes an array of UV lamps. Additional UV lamps may also be used to further sustain active species and assist processes by providing additional in-situ energy through a transparent window of the processing chamber. The system can be utilized for processes such as layer-by-layer annealing and deposition and also removal of contaminants from deposited layers.

Abstract translation: 本发明提供了一种处理系统，其包括用于形成活性气体种类的远程等离子体激活区域，耦合在远程激活区域和半导体处理室之间的透明传输管，以及用于维持活性物质活化的光能源 或者在通过透明管转移到处理室期间为非等离子体物质提供光能。 光能源最好包括一组UV灯。 还可以使用附加的UV灯来进一步维持活性种类并通过在处理室的透明窗口提供额外的原位能来辅助工艺。 该系统可用于逐层退火和沉积以及从沉积层去除污染物的工艺。

公开(公告)号：US06924188B1

公开(公告)日：2005-08-02

申请号：US09652968

申请日：2000-08-31

Applicant: Vishnu K. Agarwal

Inventor： Vishnu K. Agarwal

IPC: H01L21/02 ,  H01L21/8242 ,  H01L21/8234

CPC classification number: H01L28/75 ,  H01L27/1085 ,  H01L28/40 ,  Y10S438/957 ,  Y10S438/958

Abstract: In a semiconductor device including a first conductive layer, the first conductive layer is treated with a nitrogen/hydrogen plasma before an additional layer is deposited thereover. The treatment stuffs the surface with nitrogen, thereby preventing oxygen from being adsorbed onto the surface of the first conductive layer. In one embodiment, a second conductive layer is deposited onto the first conductive layer, and the plasma treatment lessens if not eliminates an oxide formed between the two layers as a result of subsequent thermal treatments. In another embodiment, a dielectric layer is deposited onto the first conductive layer, and the plasma treatment lessens if not eliminates the ability of the first conductive layer to incorporate oxygen from the dielectric.

公开(公告)号：US06891217B1

公开(公告)日：2005-05-10

申请号：US09428125

申请日：1999-10-26

Applicant: Vishnu K. Agarwal ,  Garo J. Derderian

Inventor： Vishnu K. Agarwal ,  Garo J. Derderian

IPC: H01L21/02 ,  H01L27/108 ,  H01L21/8242

CPC classification number: H01L28/56 ,  H01L21/02197 ,  H01L21/31637

Abstract: The invention includes methods of forming capacitors and capacitor constructions. In one implementation, a method of forming a capacitor includes forming a first capacitor electrode. A first layer of a first capacitor dielectric material is formed over the first capacitor electrode. A second layer of the first capacitor dielectric material is formed on the first layer. A second capacitor electrode is formed over the second layer of the first capacitor dielectric material. A capacitor in accordance with an implementation of the invention includes a pair of capacitor electrodes having capacitor dielectric material therebetween comprising a composite of two immediately juxtaposed and contacting, yet discrete, layers of the same capacitor dielectric material.

Abstract translation: 本发明包括形成电容器和电容器结构的方法。 在一个实施方式中，形成电容器的方法包括形成第一电容器电极。 第一电容器电介质材料的第一层形成在第一电容器电极上。 在第一层上形成第一电容器电介质材料的第二层。 在第一电容器电介质材料的第二层上形成第二电容器电极。 根据本发明的实施方式的电容器包括一对电容器电极，其间具有电容器电介质材料，其间包含相同电容器电介质材料的两个立即并置和接触但离散的层的复合材料。

公开(公告)号：US06890591B2

公开(公告)日：2005-05-10

申请号：US09970100

申请日：2001-10-02

Applicant: Vishnu K. Agarwal ,  Scott G. Meikle

Inventor： Vishnu K. Agarwal ,  Scott G. Meikle

IPC: B24B37/22 ,  B24B37/26 ,  B24D3/22 ,  B24D13/14 ,  B05D1/36 ,  B24D11/00

CPC classification number: B24B37/26 ,  B24B37/22 ,  B24D3/22 ,  Y10S977/776 ,  Y10S977/883 ,  Y10S977/888

Abstract: Polishing pads used in the manufacturing of microelectronic devices, and apparatuses and methods for making and using such polishing pads. In one aspect of the invention, a polishing pad for planarizing microelectronic-device substrate assemblies has a backing member including a first surface and a second surface, a plurality of pattern elements distributed over the first surface of the backing member, and a hard cover layer over the pattern elements. The pattern elements define a plurality of contour surfaces projecting away from the first surface of the backing member. The cover layer at least substantially conforms to the contour surfaces of the pattern elements to form a plurality of hard nodules projecting away from the first surface of the backing member. The hard nodules define abrasive elements to contact and abrade material from a microelectronic-device substrate assembly. As such, the cover layer defines at least a portion of a planarizing surface of the polishing pad.

公开(公告)号：US06750500B1

公开(公告)日：2004-06-15

申请号：US09225887

申请日：1999-01-05

Applicant: Vishnu K. Agarwal

Inventor： Vishnu K. Agarwal

IPC: H01L2972

CPC classification number: H01L28/75 ,  H01L21/28568 ,  H01L21/31604 ,  H01L28/55

Abstract: A conductive composition of tantalum nitride is disclosed for use as a conductive element in integrated circuits. The layer is shown employed in a memory cell, and in particular in a cell incorporating a high dielectric constant material such as Ta2O5. The tantalum nitride can serve as a barrier layer protecting an underlying contact plug, or can serve as the top or bottom electrode of the memory cell capacitor. The tantalum nitride has a nitrogen content of between about 7% and 40%, thereby balancing susceptibility to oxidation with conductivity. In an illustrative embodiment, the tantalum nitride layer is a bilayer formed of a thick portion having a low nitrogen concentration, and thin portion with a higher nitrogen concentration. The thick portion thus carries the bulk of the current with low resistivity, while the thinner portion is highly resistant to oxidation.

Abstract translation: 公开了用于集成电路中的导电元件的氮化钽的导电组合物。 该层显示在存储单元中，特别是在包含诸如Ta 2 O 5的高介电常数材料的单元中。 氮化钽可以用作保护下面的接触插塞的阻挡层，或者可以用作存储单元电容器的顶部或底部电极。 氮化钽的氮含量在约7％至40％之间，从而平衡了电导率对氧化的敏感性。 在说明性实施例中，氮化钽层是由氮浓度低的厚部分和氮浓度较高的薄部分形成的双层。 因此，厚的部分承载电流较低的大部分电流，而较薄的部分高度耐氧化。

公开(公告)号：US06744093B2

公开(公告)日：2004-06-01

申请号：US09930958

申请日：2001-08-17

Applicant: Vishnu K. Agarwal ,  Garo J. Derderian ,  F. Daniel Gealy

Inventor： Vishnu K. Agarwal ,  Garo J. Derderian ,  F. Daniel Gealy

IPC: H01L31119

CPC classification number: H01L27/11502 ,  H01G4/008 ,  H01G4/33 ,  H01L27/10852 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65 ,  H01L28/75 ,  H01L28/91

Abstract: A ferroelectric or high dielectric constant capacitor having a multilayer lower electrode comprising at least two layers—a platinum layer and a platinum-rhodium layer—for use in a random access memory (RAM) cell. The platinum layer of the lower electrode adjoins the capacitor dielectric, which is a ferroelectric or high dielectric constant dielectric such as BST, PZT, SBT or tantalum pentoxide. The platinum-rhodium layer serves as an oxidation barrier and may also act as an adhesion layer for preventing separation of the lower electrode from the substrate, thereby improving capacitor performance. The multilayer electrode may have titanium and/or titanium nitride layers under the platinum-rhodium layer for certain applications. The capacitor has an upper electrode which may be a conventional electrode or which may have a multilayer structure similar to that of the lower electrode. Processes for manufacturing the multilayer lower electrode and the capacitor are also disclosed.

Abstract translation: 一种铁电或高介电常数电容器，其具有包括至少两层的多层下电极 - 铂层和铂 - 铑层，用于随机存取存储器（RAM）单元。 下电极的铂层与电容器电介质接触，电容器电介质是铁电或高介电常数电介质，如BST，PZT，SBT或五氧化二钽。 铂 - 铑层用作氧化屏障，并且还可以用作防止下电极与衬底分离的粘合层，从而提高电容器性能。 对于某些应用，多层电极可以在铂 - 铑层下方具有钛和/或氮化钛层。 电容器具有可以是常规电极的上电极，或者可以具有与下电极类似的多层结构。 还公开了用于制造多层下电极和电容器的工艺。