公开(公告)号：US20220329822A1

公开(公告)日：2022-10-13

申请号：US17655895

申请日：2022-03-22

Applicant: QUALCOMM Incorporated

Inventor： Yao-Jen Chang ,  Han Huang ,  Vadim Seregin ,  Chun-Chi Chen ,  Marta Karczewicz

IPC: H04N19/137 ,  H04N19/105 ,  H04N19/159 ,  H04N19/176 ,  H04N19/70

Abstract: A device for decoding video data includes memory configured to store the video data and processing circuitry. The processing circuitry is configured to determine that a current block of the video data is inter-predicted in a combined inter-intra prediction (CIIP) mode or a geometric partitioning mode (GPM), determine that template matching is enabled for the current block, generate a motion vector for the current block based on template matching; determine a prediction block for the current block based on the motion vector in accordance with the CIIP mode or the GPM, and reconstruct the current block based on the prediction block.

公开(公告)号：US11425422B2

公开(公告)日：2022-08-23

申请号：US17318775

申请日：2021-05-12

Applicant: QUALCOMM Incorporated

Inventor： Yong He ,  Vadim Seregin ,  Muhammed Zeyd Coban ,  Yao-Jen Chang ,  Marta Karczewicz ,  Nan Hu

IPC: H04B1/66 ,  H04N7/12 ,  H04N11/02 ,  H04N11/04 ,  H04N19/70 ,  H04N19/172 ,  H04N19/184

Abstract: Example methods and devices for coding video data are disclosed. An example device for coding video data includes memory configured to store the video data, and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to determine a value of a first syntax element indicative of whether a first constraint is applicable, the first constraint being that rectangular slices are not used for a plurality of pictures. The one or more processors are also configured to decode the plurality of pictures of the video data in accordance with the value of the first syntax element.

公开(公告)号：US11425420B2

公开(公告)日：2022-08-23

申请号：US17131192

申请日：2020-12-22

Applicant: QUALCOMM Incorporated

Inventor： Yao-Jen Chang ,  Vadim Seregin ,  Muhammed Zeyd Coban

IPC: H04N19/597 ,  H04N19/176 ,  H04N19/80 ,  H04N19/52 ,  H04N19/70 ,  H04N19/159

Abstract: A video decoder can be configured to obtain, from a picture parameter set (PPS) data structure of video data, a value for a wraparound offset; in response to determining that a block of the video data is encoded in an inter prediction mode, determine a motion vector for the block and a reference picture for the block; determine a horizontal wrap around position in the reference picture based on the value for the wraparound offset; and determine a prediction block for the block based on the horizontal wrap around position.

公开(公告)号：US20220070443A1

公开(公告)日：2022-03-03

申请号：US17454555

申请日：2021-11-11

Applicant: QUALCOMM Incorporated

Inventor： Chun-Chi Chen ,  Wei-Jung Chien ,  Han Huang ,  Yao-Jen Chang ,  Kevin Pascal Andre Reuze ,  Marta Karczewicz

IPC: H04N19/105 ,  H04N19/137 ,  H04N19/176 ,  H04N19/30 ,  H04N19/46 ,  B23K20/12 ,  B23P15/00 ,  G11B33/14

Abstract: A video coder is configured to form, in a symmetric motion vector difference mode, a List 0 (L0) base vector using a L0 Advanced Motion Vector Prediction (AMVP) candidate list and a List 1 (L1) base vector using a L1 AMVP candidate list; determine a refined L0 motion vector and a refined L1 motion vector by performing a decoder-side motion vector refinement process that refines the L0 base vector and the L1 base vector; and use the refined L0 motion vector and the refined L1 motion vector to determine a prediction block for a current block of a current picture of the video data.

公开(公告)号：US20210360289A1

公开(公告)日：2021-11-18

申请号：US17318775

申请日：2021-05-12

Applicant: QUALCOMM Incorporated

Inventor： Yong He ,  Vadim Seregin ,  Muhammed Zeyd Coban ,  Yao-Jen Chang ,  Marta Karczewicz ,  Nan Hu

IPC: H04N19/70 ,  H04N19/184 ,  H04N19/172

Abstract: Example methods and devices for coding video data are disclosed. An example device for coding video data includes memory configured to store the video data, and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to determine a value of a first syntax element indicative of whether a first constraint is applicable, the first constraint being that rectangular slices are not used for a plurality of pictures. The one or more processors are also configured to decode the plurality of pictures of the video data in accordance with the value of the first syntax element.

公开(公告)号：US20210352330A1

公开(公告)日：2021-11-11

申请号：US17314959

申请日：2021-05-07

Applicant: QUALCOMM Incorporated

Inventor： Vadim Seregin ,  Yong He ,  Yao-Jen Chang ,  Muhammed Zeyd Coban

IPC: H04N19/70 ,  H04N19/184 ,  H04N19/172 ,  H04N19/105 ,  H04N19/174 ,  H04N19/30

Abstract: Example techniques and devices for decoding video data are disclosed. An example device includes memory configured to store the video data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to extract a current sub-picture from a bitstream of the video data and parse virtual boundary syntax elements indicative of virtual boundaries for a current picture, wherein the current sub-picture is associated with the current picture. The one or more processors are configured to update the virtual boundaries based at least in part on the virtual boundary syntax elements and decode the current sub-picture based on the updated virtual boundaries.

公开(公告)号：US20210297704A1

公开(公告)日：2021-09-23

申请号：US17197790

申请日：2021-03-10

Applicant: QUALCOMM Incorporated

Inventor： Yao-Jen Chang ,  Yong He ,  Vadim Seregin ,  Muhammed Zeyd Coban ,  Marta Karczewicz

IPC: H04N19/70 ,  H04N19/46 ,  H04N19/176

Abstract: A method of decoding video data, the method comprising: obtaining, from a bitstream that comprises an encoded representation of the video data, a first syntax element indicating a number of subpictures in each picture in a coded layer video sequence (CLVS); based on the first syntax element indicating that the number of subpictures in each picture in the CLVS is greater than 1, obtaining, from the bitstream, a second syntax element that specifies whether all subpicture boundaries in the CLVS are treated as picture boundaries; and based on the second syntax element specifying that all subpicture boundaries in the CLVS are treated as picture boundaries, decoding each subpicture in each of the pictures in the CLVS as a separate picture.

公开(公告)号：US20210195223A1

公开(公告)日：2021-06-24

申请号：US17125225

申请日：2020-12-17

Applicant: QUALCOMM Incorporated

Inventor： Yao-Jen Chang ,  Vadim Seregin ,  Muhammed Zeyd Coban

IPC: H04N19/187 ,  H04N19/176 ,  H04N19/137 ,  H04N19/70 ,  H04N19/51 ,  H04N19/172

Abstract: A video decoder can be configured to determine that a first subpicture of a current picture has associated scaling parameters; receive the associated scaling parameters for the first subpicture of the current picture in response to determining that the first subpicture of the current picture has the associated scaling parameters; determine motion information, for a block of the first subpicture of the current picture, that identifies a subpicture of a reference picture; locate a prediction block for the block of the first subpicture of the current picture in the subpicture of the reference picture; and scale the prediction block based on the associated scaling parameters for the first subpicture of the current picture.

公开(公告)号：US20210076074A1

公开(公告)日：2021-03-11

申请号：US17014492

申请日：2020-09-08

Applicant: QUALCOMM Incorporated

Inventor： Yao-Jen Chang ,  Muhammed Zeyd Coban ,  Vadim Seregin ,  Adarsh Krishnan Ramasubramonian ,  Marta Karczewicz

IPC: H04N19/70 ,  H04N19/186 ,  H04N19/96

Abstract: An example device for coding video data codes, in a parameter set, a first syntax element indicative of a luma coding tree block size of coding tree units (CTUs) to which the parameter set is applicable minus 5. The device codes, in the parameter set, a second syntax element indicative of a minimum luma coding block size minus 2 of luma coding blocks to which the parameter set is applicable, wherein a value of the second syntax element is in a range of 0 to a value based on the first syntax element, inclusive. The device codes the luma coding blocks to which the parameter set is applicable in accordance with the first syntax element and the second syntax element in the parameter set.

公开(公告)号：US20210076072A1

公开(公告)日：2021-03-11

申请号：US16948084

申请日：2020-09-02

Applicant: QUALCOMM Incorporated

Inventor： Yao-Jen Chang ,  Vadim Seregin ,  Muhammed Zeyd Coban ,  Adarsh Krishnan Ramasubramonian ,  Marta Karczewicz

IPC: H04N19/70 ,  H04N19/119 ,  H04N19/103 ,  H04N19/174 ,  H04N19/157

Abstract: An example device includes a memory configured to store video data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to determine whether a maximum number of merge candidates for a slice of the video data is equal to a first value. The one or more processors are configured to infer a value of a first syntax element to be equal to a second value based at least in part on the maximum number of merge candidates for the slice being equal to the first value, the first syntax element being indicative of a maximum number of merge candidates and a maximum number of merge candidates of a non-rectangular coding mode. The one or more processors are also configured to decode the slice based on the maximum number of merge candidates and the first syntax element.