Abstract:
A method of fabricating an image sensor includes forming a pixel array in an imaging region of a semiconductor substrate and forming a trench in a peripheral region of the semiconductor substrate after forming the pixel array. The peripheral region is on a perimeter of the imaging region. The trench is filled with an insulating material. An interconnect layer is formed after filling the trench with insulating material. A first wafer is bonded to a second wafer. The first wafer includes the interconnect layer and the semiconductor substrate. A backside of the semiconductor substrate is thinned to expose the insulating material. A via cavity is formed through the insulating material. The via cavity extends down to a second interconnect layer of the second wafer. The via cavity is filled with a conductive material to form a via. The insulating material insulates the conductive material from the semiconductor substrate.
Abstract:
A color image sensor includes a plurality of pixel cells arranged in a pixel array. A plurality of color filters is arranged in a color filter array disposed over the pixel array. Each color filter is aligned with a corresponding underlying pixel cell. An optical isolation grid is disposed over the color filter array such that incident light is directed through the optical isolation grid prior to be being directed through the color filter array to the pixel array. The optical isolation grid includes a plurality of sidewalls arranged to define a plurality of openings in the optical isolation grid. Each opening is aligned with a corresponding color filter such that each color filter is optically isolated by the optical isolation grid to receive incident light only through a corresponding aligned one of the plurality of openings.
Abstract:
A backside illuminated image sensor includes a semiconductor layer and a trench disposed in the semiconductor layer. The semiconductor layer has a frontside surface and a backside surface. The semiconductor layer includes a light sensing element of a pixel array disposed in a sensor array region of the semiconductor layer. The pixel array is positioned to receive external incoming light through the backside surface of the semiconductor layer. The semiconductor layer also includes a light emitting element disposed in a periphery circuit region of the semiconductor layer external to the sensor array region. The trench is disposed in the semiconductor layer between the light sensing element and the light emitting element.
Abstract:
An integrated circuit system includes a first device wafer bonded to a second device wafer at a bonding interface of dielectrics. Each wafer includes a plurality of dies, where each die includes a device, a metal stack, and a seal ring that is formed at an edge region of the die. Seal rings included in dies of the second device wafer each include a first conductive path provided with metal formed in a first opening that extends from a backside of the second device wafer, through the second device wafer, and through the bonding interface to the seal ring of a corresponding die in the first device wafer.
Abstract:
Embodiments of a process including depositing a sacrificial layer on the surface of a substrate over a photosensitive region, over the top surface of a transfer gate, and over at least the sidewall of the transfer gate closest to the photosensitive region, the sacrificial layer having a selected thickness. A layer of photoresist is deposited over the sacrificial layer, which is patterned and etched to expose the surface of the substrate over the photosensitive region and at least part of the transfer gate top surface, leaving a sacrificial spacer on the sidewall of the transfer gate closest to the photosensitive region. The substrate is plasma doped to form a pinning layer between the photosensitive region and the surface of the substrate. The spacing between the pinning layer and the sidewall of the transfer gate substantially corresponds to a thickness of the sacrificial spacer. Other embodiments are disclosed and claimed.
Abstract:
Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via.
Abstract:
An image sensor with embedded wells for accommodating light emitters includes a semiconductor substrate including an array of doped sensing regions respectively corresponding to an array of photosensitive pixels of the image sensor. The semiconductor substrate forms an array of wells. Each well is aligned with a respective doped sensing region to facilitate detection, by the photosensitive pixel that includes said respective doped sensing region, of light emitted to the photosensitive pixel by a light emitter disposed in the well. The image sensor further includes, between adjacent doped sensing regions, a light-blocking barrier to reduce propagation of light to the doped sensing-region of each photosensitive pixel from wells not aligned therewith.
Abstract:
An image sensor pixel array comprises a plurality of image pixel units to gather image information and a plurality of phase detection auto-focus (PDAF) pixel units to gather phase information. Each of the PDAF pixel units includes two of first image sensor pixels covered by two micro-lenses, respectively. Each of the image pixel units includes four of second image sensor pixels adjacent to each other, wherein each of the second image sensor pixels is covered by an individual micro-lens. A coating layer is disposed on the micro-lenses and forms a flattened surface across the whole image sensor pixel array. A PDAF micro-lens is formed on the coating layer to cover the first image sensor pixels.
Abstract:
Packaged photosensor ICs are made by fabricating an integrated circuit (IC) with multiple bondpads; forming vias from IC backside through semiconductor to expose a first layer metal; depositing conductive metal plugs in the vias; depositing interconnect metal; depositing solder-mask dielectric over the interconnect metal and openings therethrough; forming solder bumps on interconnect metal at the openings in the solder-mask dielectric; and bonding the solder bumps to conductors of a package. The photosensor IC has a substrate; multiple metal layers separated by dielectric layers formed on a first surface of the substrate into which transistors are formed; multiple bondpad structures formed of at least a first metal layer of the metal layers; vias with metal plugs formed through a dielectric over a second surface of the semiconductor substrate, interconnect metal on the dielectric forming connection shapes, and shapes of the interconnect layer coupled to each conductive plug and to solder bumps.
Abstract:
An image sensor pixel array comprises a plurality of image pixel units to gather image information and a plurality of phase detection auto-focus (PDAF) pixel units to gather phase information. Each of the PDAF pixel units includes two of first image sensor pixels covered by two micro-lenses, respectively. Each of the image pixel units includes four of second image sensor pixels adjacent to each other, wherein each of the second image sensor pixels is covered by an individual micro-lens. A coating layer is disposed on the micro-lenses and forms a flattened surface across the whole image sensor pixel array. A PDAF micro-lens is formed on the coating layer to cover the first image sensor pixels.