公开(公告)号：US20110284873A1

公开(公告)日：2011-11-24

申请号：US13146432

申请日：2010-09-28

Applicant: Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Kyoko Okita ,  Hiroki Inoue ,  Shinsuke Fujiwara ,  Yasuo Namikawa

Inventor： Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Kyoko Okita ,  Hiroki Inoue ,  Shinsuke Fujiwara ,  Yasuo Namikawa

IPC: H01L29/161

CPC classification number: H01L29/66068 ,  H01L21/02529 ,  H01L21/02609 ,  H01L21/187 ,  H01L29/7802

Abstract: A silicon carbide substrate has a substrate region and a support portion. The substrate region has a first single crystal substrate. The support portion is joined to a first backside surface of the first single crystal. The dislocation density of the first single crystal substrate is lower than the dislocation density of the support portion. At least one of the substrate region and the support portion has voids.

Abstract translation: 碳化硅衬底具有衬底区域和支撑部分。 衬底区域具有第一单晶衬底。 支撑部分连接到第一单晶的第一背面。 第一单晶基板的位错密度低于支撑部的位错密度。 衬底区域和支撑部分中的至少一个具有空隙。

公开(公告)号：US20110262681A1

公开(公告)日：2011-10-27

申请号：US13093137

申请日：2011-04-25

Applicant: Taro Nishiguchi ,  Shin Harada ,  Hiroki Inoue ,  Makoto Sasaki

Inventor： Taro Nishiguchi ,  Shin Harada ,  Hiroki Inoue ,  Makoto Sasaki

IPC: C30B23/00 ,  B32B3/14

CPC classification number: H01L29/7802 ,  C30B29/36 ,  C30B33/06 ,  H01L21/02002 ,  H01L29/1608 ,  H01L29/66068

Abstract: A carbon layer is formed on a first region of a main surface of a material substrate. On the material substrate, first and second single-crystal layers are arranged such that each of a first backside surface of the first single-crystal layer and a second backside surface of the second single-crystal layer has a portion facing a second region of the main surface of the material substrate and such that a gap between a first side surface of the first single-crystal layer and a second side surface of the second single-crystal layer is located over the carbon layer. By heating the material substrate and the first and second single-crystal layers, a base substrate connected to each of the first and second backside surfaces is formed. In this way, voids can be prevented from being formed in the silicon carbide substrate having such a plurality of single-crystal layers.

Abstract translation: 在材料基板的主表面的第一区域上形成碳层。 在材料基板上，第一和第二单晶层被布置成使得第一单晶层的第一背面和第二单晶层的第二背面中的每一个具有面向第一单晶层的第二区域的部分 使得第一单晶层的第一侧表面和第二单晶层的第二侧表面之间的间隙位于碳层的上方。 通过加热材料基板和第一和第二单晶层，形成连接到第一和第二背面中的每一个的基底基板。 以这种方式，可以防止在具有多个单晶层的碳化硅衬底中形成空隙。

公开(公告)号：US20110199816A1

公开(公告)日：2011-08-18

申请号：US13022407

申请日：2011-02-07

Applicant: Hiroki Inoue ,  Kiyoshi Kato ,  Takanori Matsuzaki ,  Shuhei Nagatsuka

Inventor： Hiroki Inoue ,  Kiyoshi Kato ,  Takanori Matsuzaki ,  Shuhei Nagatsuka

IPC: G11C11/24

CPC classification number: G11C11/24 ,  G11C11/403 ,  G11C11/405 ,  H01L27/1052 ,  H01L27/11521 ,  H01L27/1225

Abstract: An object is to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied, and the number of times of writing is not limited. The semiconductor device is formed using a wide gap semiconductor and includes a potential change circuit which selectively applies a potential either equal to or different from a potential of a bit line to a source line. Thus, power consumption of the semiconductor device can be sufficiently reduced.

Abstract translation: 目的在于提供具有新颖结构的半导体器件，其中即使在不提供电力的情况下也可以保持存储的数据，并且写入的次数不受限制。 半导体器件使用宽间隙半导体形成，并且包括电位改变电路，其选择性地将与位线的电位等于或不同的电位施加到源极线。 因此，可以充分降低半导体器件的功耗。

公开(公告)号：US20110198593A1

公开(公告)日：2011-08-18

申请号：US13019330

申请日：2011-02-02

Applicant: Kiyoshi Kato ,  Shuhei Nagatsuka ,  Hiroki Inoue ,  Takanori Matsuzaki

Inventor： Kiyoshi Kato ,  Shuhei Nagatsuka ,  Hiroki Inoue ,  Takanori Matsuzaki

IPC: H01L29/772

CPC classification number: H01L27/108 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/1156 ,  H01L27/1225

Abstract: A semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limitation on the number of times of writing. In the semiconductor device, a plurality of memory cells each including a first transistor, a second transistor, and a capacitor is provided in matrix and a wiring (also called a bit line) for connecting one memory cell to another memory cell and a source or drain electrode of the first transistor are electrically connected to each other through a source or drain electrode of the second transistor. Accordingly, the number of wirings can be smaller than that in the case where the source or drain electrode of the first transistor and the source or drain electrode of the second transistor are connected to different wirings. Thus, the degree of integration of the semiconductor device can be increased.

Abstract translation: 具有新颖结构的半导体器件，其中即使在不提供电力的情况下也可以保持存储的数据，并且对写入次数没有限制。 在半导体装置中，以矩阵形式设置有各自包括第一晶体管，第二晶体管和电容器的多个存储单元，以及用于将一个存储单元连接到另一个存储单元的源（或称为位线） 第一晶体管的漏极电极通过第二晶体管的源极或漏极电极彼此电连接。 因此，布线数量可以比第一晶体管的源极或漏极以及第二晶体管的源极或漏极连接到不同的布线的情况下的布线数量小。 因此，可以提高半导体器件的集成度。

公开(公告)号：US20110175108A1

公开(公告)日：2011-07-21

申请号：US13005719

申请日：2011-01-13

Applicant: Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Kyoko Okita ,  Hiroki Inoue ,  Shinsuke Fujiwara ,  Yasuo Namikawa

Inventor： Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Kyoko Okita ,  Hiroki Inoue ,  Shinsuke Fujiwara ,  Yasuo Namikawa

IPC: H01L33/18

CPC classification number: H01L33/16 ,  H01L33/007 ,  H01L33/32

Abstract: A silicon carbide substrate has a first layer facing a semiconductor layer and a second layer stacked on the first layer. Dislocation density of the second layer is higher than dislocation density of the first layer. Thus, quantum efficiency and power efficiency of a light-emitting device can both be high.

Abstract translation: 碳化硅衬底具有面向半导体层的第一层和堆叠在第一层上的第二层。 第二层的位错密度高于第一层的位错密度。 因此，发光装置的量子效率和功率效率都可以高。

公开(公告)号：US20110133706A1

公开(公告)日：2011-06-09

申请号：US12956491

申请日：2010-11-30

Applicant: Kei Takahashi ,  Yoshiaki Ito ,  Hiroki Inoue ,  Tatsuji Nishijima

Inventor： Kei Takahashi ,  Yoshiaki Ito ,  Hiroki Inoue ,  Tatsuji Nishijima

IPC: H02M3/02

CPC classification number: H02M3/156 ,  H01L27/12 ,  H01L27/1225 ,  H01L29/7869 ,  H02M3/155

Abstract: A DC converter circuit having high reliability is provided. The DC converter circuit includes: an inductor configured to generate electromotive force in accordance with a change in flowing current; a transistor including a gate, a source, and a drain, which is configured to control generation of the electromotive force in the inductor by being on or off; a rectifier in a conducting state when the transistor is off; and a control circuit configured to control on and off of the transistor. The transistor includes an oxide semiconductor layer whose hydrogen concentration is less than or equal to 5×1019 atoms/cm3 as a channel formation layer.

Abstract translation: 提供了具有高可靠性的DC转换器电路。 DC转换器电路包括：电感器，被配置为根据流动电流的变化产生电动势; 包括栅极，源极和漏极的晶体管，其被配置为通过导通或关断来控制电感器中的电动势的产生; 当晶体管截止时处于导通状态的整流器; 以及被配置为控制晶体管的导通和截止的控制电路。 晶体管包括作为沟道形成层的氢浓度小于或等于5×1019原子/ cm3的氧化物半导体层。

公开(公告)号：US07923796B2

公开(公告)日：2011-04-12

申请号：US11440030

申请日：2006-05-25

Applicant: Yutaka Shionoiri ,  Tomoaki Atsumi ,  Hiroki Inoue

Inventor： Yutaka Shionoiri ,  Tomoaki Atsumi ,  Hiroki Inoue

IPC: H01L27/14 ,  G08B13/14

CPC classification number: G06K19/07749 ,  G06K19/0723

Abstract: It is an object of the present invention to provide a semiconductor device in which an arrangement area of capacitance can be reduced and resonance frequency can be easily adjusted. The semiconductor device includes an antenna and a resonance circuit including a capacitor connected to the antenna in parallel where the capacitor is formed by connecting x pieces of first capacitor (x is an arbitrary natural number), y pieces of second capacitor (y is an arbitrary natural number), and z pieces of third capacitor (z is an arbitrary natural number) in parallel; and the first capacitor, the second capacitor, and the third capacitor have different capacitance values from each other. It is preferable that each of the first capacitor, the second capacitor, and the third capacitor be a MIS capacitor. Further, at least one of the first capacitor, the second capacitor, and the third capacitor is preferably formed by connecting a plurality of capacitors in parallel.

Abstract translation: 本发明的目的是提供一种半导体器件，其中可以减小电容的布置面积并且可以容易地调节谐振频率。 半导体器件包括天线和谐振电路，其包括并联连接到天线的电容器，其中通过连接x个第一电容器（x是任意自然数）形成电容器，y个第二电容器（y是任意的） 自然数）和z个第三电容器（z是任意自然数）; 并且第一电容器，第二电容器和第三电容器具有彼此不同的电容值。 优选地，第一电容器，第二电容器和第三电容器中的每一个都是MIS电容器。 此外，优选通过并联连接多个电容器来形成第一电容器，第二电容器和第三电容器中的至少一个。

公开(公告)号：US07839046B2

公开(公告)日：2010-11-23

申请号：US12232556

申请日：2008-09-19

Applicant: Toshiharu Hashimoto ,  Hiroki Inoue ,  Hidekazu Yabuuchi ,  Masaaki Nishikata ,  Shinji Suematsu

Inventor： Toshiharu Hashimoto ,  Hiroki Inoue ,  Hidekazu Yabuuchi ,  Masaaki Nishikata ,  Shinji Suematsu

IPC: H02K1/12 ,  H02K1/14

CPC classification number: H02K5/128 ,  H02K1/145 ,  H02K7/14 ,  H02K11/33 ,  H02K15/12 ,  H02K21/145 ,  H02K2211/03

Abstract: A claw pole type motor includes a rotor having a magnet arranged on an outer circumferential surface thereof and a stator including an annular iron core and an annular coil received within the iron core. The iron core includes a yoke portion opened in an inner circumferential surface opposite to the rotor, a plurality of upper claw-shaped magnetic poles and a plurality of lower claw-shaped magnetic poles which are arranged along an inner circumferential surface of the annular coil. The upper/lower claw-shaped magnetic poles are curved to extend axially downwardly/upwardly from an upper/lower inner edge of the yoke portion, respectively. The upper and the low claw-shaped magnetic poles are alternately arranged along a circumferential direction of the iron core. The yoke portion has cutout portions formed in non-magnetic path regions which do not include magnetic paths through which magnetic flux flows between neighboring claw-shaped magnetic poles across the annular coil.

Abstract translation: 爪极式电动机包括具有布置在其外圆周表面上的磁体的转子和包括环形铁芯的定子和容纳在铁芯内的环形线圈。 铁芯包括在与转子相对的内周面开口的轭部，沿着环形线圈的内周面配置的多个上爪状磁极和多个下爪形磁极。 上/下爪形磁极是弯曲的，分别从轭部的上/下内边缘向下/向上延伸。 上下爪形磁极沿着铁芯的圆周方向交替布置。 轭部具有形成在非磁路区域中的切口部分，其不包括通过环形线圈的相邻爪形磁极之间流过磁通的磁路。

公开(公告)号：US20100181985A1

公开(公告)日：2010-07-22

申请号：US12686579

申请日：2010-01-13

Applicant: Hiroki Inoue ,  Kiyoshi Kato ,  Shuhei Nagatsuka ,  Koichiro Kamata ,  Tsutomu Murakawa ,  Takahiro Tuji ,  Kaori Ikada

Inventor： Hiroki Inoue ,  Kiyoshi Kato ,  Shuhei Nagatsuka ,  Koichiro Kamata ,  Tsutomu Murakawa ,  Takahiro Tuji ,  Kaori Ikada

IPC: G05F3/16

CPC classification number: G05F3/16 ,  G05F1/56 ,  G05F3/242

Abstract: One object of the present invention is to provide a regulator circuit with an improved noise margin. In a regulator circuit including a bias circuit generating a reference voltage on the basis of the potential difference between a first power supply terminal and a second power supply terminal, and a voltage regulator outputting a potential to an output terminal on the basis of a reference potential input from the bias circuit, a bypass capacitor is provided between a power supply terminal and a node to which a gate of a transistor included in the bias circuit is connected.

Abstract translation: 本发明的一个目的是提供一种具有改善的噪声容限的调节器电路。 在包括基于第一电源端子和第二电源端子之间的电位差产生参考电压的偏置电路的调节器电路中，以及基于参考电位向输出端子输出电位的电压调节器 在偏置电路的输入端，在电源端子与偏置电路中包含的晶体管的栅极连接的节点之间设置有旁路电容器。

公开(公告)号：US07622535B2

公开(公告)日：2009-11-24

申请号：US11089160

申请日：2005-03-24

Applicant: Yorimichi Dairoku ,  Yoshio Irie ,  Shinichi Fujino ,  Yasuhiro Fujita ,  Kenji Tada ,  Hiroki Inoue ,  Makoto Nagasawa ,  Hirofumi Shibata

Inventor： Yorimichi Dairoku ,  Yoshio Irie ,  Shinichi Fujino ,  Yasuhiro Fujita ,  Kenji Tada ,  Hiroki Inoue ,  Makoto Nagasawa ,  Hirofumi Shibata

IPC: C08F2/00 ,  C08F236/00 ,  C08F20/06

CPC classification number: C08F6/006

Abstract: The present invention relates to a method for continuous production of a water-absorbent resin by use of an continuous polymerization device having a charge part of a monomer aqueous solution; an endless belt on which the monomer and a hydropolymer formed are conveyed; and a discharge part of the hydropolymer, wherein the continuous polymerization device has side walls and a ceiling, and the space ratio in the device represented by the equation, “space ratio in the device=B/A”, is in the range of 1.2 to 20. In the equation, A is a maximum cross-sectional area (cm2) of the hydropolymer during the polymerization in the width direction of the endless belt, and B is a maximum cross-sectional area (cm2) of the space between the endless belt of the continuous polymerization device and the ceiling of the continuous polymerization device in the width direction of the endless belt.

Abstract translation: 本发明涉及使用具有单体水溶液的电荷部分的连续聚合装置连续制造吸水性树脂的方法; 输送单体和形成的氢化聚合物的环状带; 和氢化聚合物的排出部分，其中连续聚合装置具有侧壁和天花板，并且由等式“器件中的空间比= B / A”表示的器件中的空间比在1.2 在该方程式中，A是在环形带的宽度方向上的聚合期间的氢化聚合物的最大横截面积（cm2），B是在环状带的宽度方向上的最大横截面积（cm2） 连续聚合装置的环形带和连续聚合装置的天花板在环形带的宽度方向上。