Pixel Circuit and Driving Method Thereof, and Display Device

    公开(公告)号:US20220310011A1

    公开(公告)日:2022-09-29

    申请号:US17424176

    申请日:2021-01-13

    Abstract: A pixel circuit includes a current control sub-circuit, a combined light emitting sub-circuit, and a first light emitting element to an Nth light emitting element, N being a natural number greater than 1. The current control sub-circuit is configured to receive a display data signal and a light emitting control signal, control whether to generate a driving current according to the light emitting control signal, and control a current intensity of the generated driving current according to the display data signal. The combined light emitting sub-circuit is configured to receive the driving current and a first light emitting data signal to an Nth light emitting data signal and drive one or more of the first light emitting element to the Nth light emitting element to emit light according to the first light emitting data signal to the Nth light emitting data signal.

    DRIVING BACKPLANE, DISPLAY PANEL AND DISPLAY DEVICE

    公开(公告)号:US20220246074A1

    公开(公告)日:2022-08-04

    申请号:US17475529

    申请日:2021-09-15

    Abstract: The present disclosure provides a driving backplane, a display panel and a display device. The driving backplane comprises: a base substrate having a plurality of first conductive vias; a pixel circuit layer disposed on the base substrate and comprising a plurality of pixel circuits and a plurality of signal lines; a conductive portion, at least part of which is disposed in one first conductive via; a conductive pattern layer disposed on the base substrate and comprising a plurality of first conductive patterns; and a shielding layer disposed between the pixel circuit layer and the conductive pattern layer and having a plurality of hollow areas; wherein each of the plurality of signal lines is coupled to one first conductive pattern through at least one of the conductive portions.

    DRIVING CIRCUIT, DRIVING CONTROL METHOD AND DISPLAY PANEL

    公开(公告)号:US20220238066A1

    公开(公告)日:2022-07-28

    申请号:US17491055

    申请日:2021-09-30

    Abstract: The present application discloses a driving circuit and a display panel. The driving circuit includes a driving current generation circuit and a light emitting time control circuit. The driving current generation circuit is connected to a first reference voltage terminal, a data voltage terminal and the light emitting time control circuit, and is configured to generate a driving current under the control of the first reference voltage terminal and the data voltage terminal, and transmit the driving current to the light emitting time control circuit. The light emitting time control circuit is connected to the driving current generation circuit, a time control signal terminal, a reference signal terminal and a light emitting element, and is configured to control a duration of transmitting the driving current to the light emitting element under the control of the time control signal terminal and the reference signal terminal.

    PIXEL CIRCUIT, ARRAY SUBSTRATE COMPRISING THE SAME AND DISPLAY PANEL

    公开(公告)号:US20220180802A1

    公开(公告)日:2022-06-09

    申请号:US17652660

    申请日:2022-02-25

    Abstract: An array substrate including a plurality of pixel units arranged in a matrix is provided. Each pixel unit at least includes a first sub-pixel, a second sub-pixel and a third sub-pixel that emit light of different colors, the first sub-pixel has a lower luminous efficiency than the second and third sub-pixels. The array substrate further comprises a plurality of first gate lines and a plurality of second gate lines that correspond to respective rows of pixel units of the plurality of pixel units. The first sub-pixel in each row of pixel units of the plurality of pixel units is coupled to a first gate line of the plurality of first gate lines, and the second sub-pixel and the third sub-pixel in the row of pixel units of the plurality of pixel units are both coupled to a second gate line of the plurality of second gate lines.

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