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公开(公告)号：US20210333608A1
公开(公告)日：2021-10-28
申请号：US16606895
申请日：2019-05-16
Inventor： Lei YAO , Dawei SHI , Wentao WANG , Lu YANG , Haifeng XU , Lei YAN , Jinfeng WANG , Jinjin XUE , Fang YAN , Xiaowen SI , Lin HOU , Zhixuan GUO , Yuanbo LI , Xiaofang LI
IPC: G02F1/136 , G02F1/1368 , H01L27/12 , G02F1/1362
Abstract: An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate; a plurality of gate lines on a side of the base substrate; a plurality of data lines on a side of the plurality of gate lines away from the base substrate and intersecting with the plurality of gate lines; and a plurality of light shielding metal portions between the base substrate and each of the plurality of gate lines; respective one of the gate lines includes a plurality of gate line sub-segments separated by the plurality of data lines, respectively, every two adjacent gate line sub-segments in the respective one of the gate lines correspond to one of the light shielding metal portions, and the every two adjacent gate line sub-segments are connected in series through the one of the light shielding metal portions.
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622.发明申请公开(公告)号：US20210328073A1
公开(公告)日：2021-10-21
申请号：US16335065
申请日：2018-09-25
Inventor： Wei LIU , Yongbo JU , Xikang JIN , Zhimin WANG , Jianbin GAO , Xiaoguang CHEN , Xinbo ZHOU , Jianjun CHEN
IPC: H01L29/786 , H01L29/66
Abstract: The present disclosure provides a thin-film transistor and a method for manufacturing the same, an array substrate, and a display device. The thin film transistor of the present disclosure include a plurality of insulating layers, among which at least one insulating layer on the low temperature polysilicon layer comprises organic material, so vias could be formed in the organic material by an exposing and developing process, thereby effectively avoiding the over-etching problem of the low temperature polycrystalline silicon layer caused by dry etching process. By adopting the method for manufacturing the film transistors of the present disclosure, the contact area and uniformity of the drain electrode and the low temperature polysilicon material layer can be increased; the conductivity can be improved; and the production cycle of products can be greatly reduced and thereby improving the equipment capacity.
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公开(公告)号：US11145682B2
公开(公告)日：2021-10-12
申请号：US16621325
申请日：2019-03-13
Inventor： Yanan Yu , Jingyi Xu , Yanwei Ren , Xin Zhao , Xiaokang Wang , Yuelin Wang , Huijie Zhang
IPC: H01L27/12 , H01L29/786
Abstract: An array substrate which includes a display region and a peripheral region surrounding the display region, the peripheral region includes a data line lead region and a driving circuit region, and the data line lead region is between the driving circuit region and the display region; the driving circuit region includes a driving circuit, the data line lead region includes a the plurality of data line leads, and the plurality of data line leads extend from the display region and are electrically connected with the driving circuit; and the data line lead region includes peripheral data line leads, a region of the peripheral region close to the peripheral data line leads includes at least one retaining wall configured to prevent plasma from affecting the peripheral data line leads. A method for fabricating an array substrate, a display panel, and a display device are also disclosed.
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公开(公告)号：US20210311349A1
公开(公告)日：2021-10-07
申请号：US16319617
申请日：2018-06-05
Inventor： Yang XIE , Weixin MENG , Jian GUO
IPC: G02F1/1333 , H01L27/32 , H01L51/52 , H01L51/56 , G02F1/1337 , G02F1/1362 , G02F1/1335
Abstract: An array substrate, a manufacturing method of the same, a display panel and a display device are provided. The array substrate includes a display region and a peripheral region around the display region, a photosensitive layer is in the display region and a peripheral circuit is in the peripheral region. The array substrate further includes an alignment film covering the photosensitive layer and the peripheral circuit. The array substrate further includes an insulating layer between the peripheral circuit and the alignment film. The alignment film is a photo alignment film, and the insulating layer is configured to absorb and/or reflect an alignment light adopted for performing photoalignment to obtain the alignment film.
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625.发明授权公开(公告)号：US11127342B2
公开(公告)日：2021-09-21
申请号：US16096102
申请日：2018-01-15
IPC: G09G3/3233 , G09G3/32 , G09G3/20
Abstract: The present disclosure provides a display device, a pixel circuit and its control method, the circuit including: a resetting and charging circuit, for resetting a capacitor connected between a gate electrode of the driving transistor of the pixel circuit and an anode of a LED, and then charging the capacitor; a writing circuit, for writing a data signal to the gate electrode of the driving transistor; a driving circuit including the driving transistor, for driving the LED to emit light when the driving transistor receives the data signal; wherein, the driving transistor for driving the LED to emit light is an oxide TFT, and the other transistors in the pixel circuit are low temperature polysilicon (LTPS) TFTs.
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Patent Agency Ranking
626.发明授权公开(公告)号：US11121226B2
公开(公告)日：2021-09-14
申请号：US16632179
申请日：2019-01-29
Inventor： Lei Yan , Feng Li , Yezhou Fang , Jun Fan , Lei Li , Yanyan Meng , Lei Yao , Jinjin Xue , Chenglong Wang , Jinfeng Wang , Lin Hou , Zhixuan Guo
IPC: H01L29/417 , H01L29/66 , H01L29/786 , G02F1/1343 , G02F1/1362 , H01L27/12 , H01L27/32
Abstract: The present disclosure provides a thin film transistor and a method for manufacturing the same, an array substrate, and a display device. The thin film transistor includes: an active layer located on one side of the substrate; a first interlayer dielectric layer located on one side of the active layer away from the substrate; a source penetrating through the first interlayer dielectric layer, and connected to the active layer; a second interlayer dielectric layer located on one side of the first interlayer dielectric layer away from the active layer and covering the source; and a drain, wherein the drain comprises a first portion penetrating through the second interlayer dielectric layer and the first interlayer dielectric layer and connected to the active layer.
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公开(公告)号：US11120718B2
公开(公告)日：2021-09-14
申请号：US16308345
申请日：2018-03-01
Inventor： Fei Huang
IPC: G09G3/20
Abstract: The shift register unit includes a start unit (11), a pull-up node control unit (12), a pull-down node control unit (13), a gate driving signal output unit (14), a first capacitor unit (16), and a pull-up node noise reduction unit (15) connected to a noise reduction control end (NC), a pull-up node (PU) and a low level input end (VSS), and configured to control the pull-up node (PU) to be electrically connected to, or electrically disconnected from, the low level input end (VSS) under the control of the noise reduction control end (NC).
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公开(公告)号：US11114640B2
公开(公告)日：2021-09-07
申请号：US16088126
申请日：2018-01-22
Inventor： Lina Wang , Fuyi Cui , Shuai Chen , Zifeng Wang
IPC: H01L51/52
Abstract: The present disclosure provides a display substrate and a method for manufacturing the same, and a display device. The display substrate includes a display area and an edge area surrounding the display area. The edge area is provided with bonding adhesive. The bonding adhesive is used to bond the display substrate and a counter substrate with which the display substrate is to be assembled together. A support structure is provided on the edge area and on a side of the bonding adhesive away from the display area. The support structure forms support between the display substrate and the counter substrate which have been assembled with each other.
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公开(公告)号：US11107380B2
公开(公告)日：2021-08-31
申请号：US15775463
申请日：2017-11-21
Inventor： Bo Wang
Abstract: The present disclosure provides a gate driver-on-array (GOA) unit and a method of driving the same, a GOA circuit, and a display apparatus. The GOA unit includes a pulling-up circuit, a pulling-down circuit and an output holding circuit. The pulling-up circuit is configured to output a gate scanning signal from the output terminal, under the control of a trigger signal, a first control signal and a second control signal. The output holding circuit is configured to hold the gate scanning signal output from the output terminal, under the control of the trigger signal, the first control signal and the second control signal. The pulling-down circuit is configured to reset the gate scanning signal and hold the gate scanning signal in a reset state for a set time period, under the control of the trigger signal, the first control signal and the second control signal.
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公开(公告)号：US11101452B2
公开(公告)日：2021-08-24
申请号：US16075251
申请日：2017-12-15
Inventor： Zhiliang Jiang , Zhenli Zhou
Abstract: Provided are a packaging device and a display panel packaging method. The device includes: a guide line, a container for containing a package adhesive, a rotary worktable for placing a to-be-packaged device and a winding device for driving the guide line to move. The guide line is mounted on the winding device, and part of the guide line is immerged into the package adhesive so the guide line adhered by the package adhesive passes through the rotary worktable when moving. The to-be-packaged display device is disposed on rotary worktable, thus the guide line contacts with the frit. When the rotary worktable rotates, the guide line moves and passes through the container containing package adhesive. When part of the guide line adhered by package adhesive passes through the rotary worktable, the package adhesive is coated on the frit, thereby achieving uniform coating of the package adhesive under surface tension of frit.
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