Abstract:
The invention relates to a filter circuit and a method for making a filter circuit comprising at least one gyrator core section (GCi) having four inverters mutually connected in a loop configuration between a pair of input terminals (i—1; i—2) and a pair of output terminals (o—1; o—2). At least one common mode feedback section (CMIi, CMOi) is provided between the pair of input terminals and/or the pair of output terminals. The common mode feedback section comprises two series connections respectively formed by an inverter and a short-sectioned inverter connected antiparallelly between the input terminals or the output terminals. The inverters may be constituted by a MOS, CMOS or BiCMOS or bipolar transistor. According to the invention, the channel region dimensions of the transistors of the gyrator core section and/or the common mode feedback section are selected such that the relationship g*C≧gm*cm is fulfilled, where g is the effective conductive loading of the gyrator core section terminals, C is the effective capacitive loading of the gyrator core section terminals, gm is the effective gyration constant of the gyrator core section, and cm is the effective transcapacitance of the gyrator core section.
Abstract:
A demodulator circuit for demodulating a frequency modulated input, which includes a detector (14) that is operable to produce a demodulated signal from an incoming frequency modulated signal. A tuning circuit (19) is connected to the detector and operable to vary the frequency response characteristics of the detector. An auxiliary detector (25, 26) is connected to receive a reference frequency signal and to provide an auxiliary tuning signal to the detector on the basis of detection of the reference frequency signal.
Abstract:
An equalization amplifier (30) is disclosed which includes two amplifier stages (32, 34) connected in cascade. The first amplifier stage (32) includes a low pass filter amplifier (40) having a pole frequency of F1 and a feed forward path (36) bypassing the low pass filter amplifier. The feed forward path provides the input signal to an adder circuit (42) where it is added to the output of the low pass filter amplifier. The effect of this addition is to provide the first amplifier with a zero frequency of F2, where F2 is greater than F1. The resulting sum signal is applied to the second amplifier stage (34) which also has a low pass filter characteristic. The second filter has a pole frequency of F3, where F3 is greater than F2. The equalization amplifier is particularly useful for providing RIAA equalization of phono cartridge output signals.
Abstract:
A digital affine transformation modulator and power amplifier drives a transmitter antenna. The modulator performs an affine transformation on a signal, wherein the I, Q space is mapped to a plurality of sectors. A signal in a sector is expressed as the sum of two vectors, the angles of which define the sector boundaries. A digital power amplifier comprises a plurality of amplifier cells, each cell comprising at least two amplifier units. For a given signal, each amplifier unit selectively amplifies a clock signal having a phase corresponding to one of the boundary angles of the signal's affine transformed sector. A subset of the plurality of amplifier cells receiving each phase clock signal are enabled, based on the magnitude of the associated vector describing the signal in affine transform space. The modulation scheme exhibits higher efficiency than quadrature modulation, without the bandwidth expansion and group delay mismatch of polar modulation.
Abstract:
A processing device (40) for processing an analog complex input signal generated by downconversion of an aggregated-spectrum radio-frequency signal in a radio-receiver (10), wherein the complex input signal comprises a plurality of sub bands (S1-S4) scattered across a total frequency band (4) of the complex input signal. The processing device (40) comprises a plurality of processing paths (P1-PN). wherein each processing path (P1-PN) is adapted to process an associated sub band (S1-S4). Each processing path comprises a complex mixer (CM1-CMN) adapted to frequency translate the complex input signal, and an analog channel-selection filter (CSF1-CSFN) arranged to filter an output signal of the complex mixer (CM1-CMN) and pass the frequency translated associated sub band (S1-S4). A control unit (60) is adapted to receive control data indicating frequency locations of the sub bands (S1-S4) and, for each processing path (P1-PN). control the local oscillator signal of the complex mixer (CM1-CMN) of the processing path (P1-PN) based on the frequency location of the associated sub band (S1-S4) and the passband of the channel-selection filter (CSF1-CSFN) of the processing path (P1-PN), such that the frequency-translated associated sub band (S1-S4) appears within a passband of the channel-selection filter (CSF1-CSFN) of the processing path (P1-PN). The distortion monitored in the unused paths may be used to improve the performance of the used paths.
Abstract:
Methods and apparatus are disclosed for automatically adjusting antenna impedance match in a wireless transceiver employing phase-amplitude modulation. According to some embodiments of the invention, a wireless transceiver comprises a transmitter circuit and a receiver circuit connected to the antenna by a transmit/receive duplexer. An electronically adjustable matching network is located between the transmitter output and the antenna. To control the adjustable matching network, a directional coupler is located between the transmitter output and the matching network to separate transmit signals reflected from the antenna system, including the antenna, the matching network and the T/R duplexer. The reflected transmit signals are routed to the receiver circuit, which digitizes the reflected signal and determines an antenna reflection coefficient based on the digitized reflected signal and the modulation signal used to create the transmit signal. The complex antenna reflection coefficient is used to determine any adjustment needed to the antenna matching network.
Abstract:
The present disclosure generally relates to the field of receiver structures in radio communication systems and more specifically to passive mixers in the receiver structure and to a technique for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency. A passive mixer for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency comprises a cancellation component 220 for generating a first cancellation signal for cancelling second order intermodulation components by superimposing the first signal weighted by a cancellation value on the third signal; and a mixing component 231 having a first terminal 232 for receiving the first signal, a second terminal 234 for outputting the second signal, and a third terminal 236 for receiving the first cancellation signal, wherein the mixing component 231 is adapted to provide the second signal as output at the second terminal 234 by mixing the first signal provided as input at the first terminal 232 and the first cancellation signal provided as input at the third terminal 236.
Abstract:
An entire radio transceiver can be completely integrated into one IC chip. In order to integrate the IF filters on the chip, a heterodyne architecture with a low IF is used. A single, directly modulated VCO is used for both up-conversion during transmission, and down-conversion during reception. Bond-wires are used as resonators in the oscillator tank for the VCO. A TDD scheme is used in the air interface to eliminate cross-talk or leakage. A Gaussian-shaped binary FSK modulation scheme is used to provide a number of other implementation advantages.
Abstract:
A modulation circuit for use in a radiofrequency transmitter includes a local oscillator circuit configured to generate one or more local oscillator signals at a desired frequency and with a duty cycle at or about twenty-five percent, and a modulator configured to generate one or more modulated signals responsive to the one or more local oscillator signals and one or more baseband information signals. In at least one embodiment, the modulation circuit includes a modulator comprising a combined mixing and transconductance circuit that includes a transistor circuit for each baseband information signal serving as a modulation input to the modulator. Each transistor circuit comprises a first transistor driven by the baseband information signal and coupling a modulator output node to a corresponding transconductance element, and a second transistor driven by one of the one or more local oscillator signals and coupling the corresponding transconductance element to a signal ground node.
Abstract:
A communication device has a controller operatively connected to at least a first transceiver and a second transceiver, wherein the first transceiver receives signals on one or more channels within a first frequency band and the second transceiver transmits signals on one or more channels within a second frequency band, wherein the first and second frequency bands are adjacent one another so that each of the first and second frequency bands has an adjacent border and a nonadjacent border. Coexistence between the first and second transceivers is achieved by adjusting receive and/or transmit filters associated with the transceivers to create a guard band that is located more in the first frequency band if the second transceiver is using frequencies close to its adjacent border, and a guard band that is more in the second frequency band if the second transceiver is not using frequencies close to its adjacent border.