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    Method of producing semiconductor devices
    42.
    发明授权
    Method of producing semiconductor devices 失效
    生产半导体器件的方法

    公开(公告)号：US3464105A

    公开(公告)日：1969-09-02

    申请号：US3464105D

    申请日：1966-04-21

    Applicant: SYLVANIA ELECTRIC PROD

    Inventor： CHAGNON PAUL L

    IPC: H01L21/50 ,  H01L23/49 ,  H01L23/495 ,  B01J17/00 ,  H01L1/10

    CPC classification number: H01L24/06 ,  H01L21/50 ,  H01L23/49517 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/0603 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48247 ,  H01L2224/48699 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01084 ,  H01L2924/181 ,  Y10T29/49172 ,  H01L2924/00 ,  H01L2924/20751 ,  H01L2224/05599

    Abstract: 1,160,932. Semi-conductor devices. SYLVANIA ELECTRIC PRODUCTS Inc. 21 April, 1967 [21 April, 1966], No. 18569/67. Heading H1K. A method of attaching lead wires to semiconductor devices comprises attaching groups of wires to a carrier strip, connecting a semiconductor device to the ends of each group of wires, encapsulating each semi-conductor device, and separating the wires from the carrier strip. As shown, Fig. 7, the carrier strip 10 comprises an elongate member having at one edge upstanding projections 12, each having three holes through which wires 20 are passed, and having at the opposite edge, and at the same level as the holes, extending platforms 14 to which the ends of the wires 20 are bonded. The portions 21 of the wires 20 extending from projections 12 are swaged, a semi-conductor die 30 is secured to the centre wires and its other electrode connected by fine wires 35, 36 to the outer wires. The device and the end portions of the wires are then encapsulated and the parts of the platforms 14 to which the wires 20 are secured are severed together with parts 22 of the wires, and the assembly removed from the strip. In a modification, Figs. 10 to 13 (not shown) the devices are of the type described in Specification 1,160,931, each comprising a semiconductor die mounted on conductive lands on an insulating board, and are mounted by connecting the wires (20) to the conductive lands and encapsulating and severing as in the first embodiment.

    Abstract translation: 1,160,932。 半导体器件。 SYLVANIA ELECTRIC PRODUCTS Inc. 1967年4月21日[1966年4月21日]，第18569/67号。 标题H1K。 将引线附接到半导体器件的方法包括将导线组附接到载体条，将半导体器件连接到每组导线的端部，封装每个半导体器件，以及将导线与载体条分开。 如图所示。 如图7所示，载体带10包括细长构件，其在一个边缘处具有直立的突起12，每个突起具有三个孔，线20穿过该孔，并且在与孔相反的边缘处和与其相同的水平处具有延伸平台14， 电线20的端部被接合。 从突起12延伸出的线20的部分21被模锻，半导体管芯30固定到中心线，而另一个电极通过细线35,36连接到外部线。 电线的装置和端部然后被封装，并且电线20固定到的平台14的部分与电线的部分22一起被切断，并且组件从带上移除。 在变形例中， 如图10至图13（未示出）所示，器件为规格1,160,931中所述的类型，每个包括安装在绝缘板上的导电焊盘上的半导体管芯，并且通过将导线（20）连接到导电焊盘并封装和切断 如第一实施例。

    Microwave diode with low capacitance package
    49.
    发明授权
    Microwave diode with low capacitance package 失效
    具有低电容封装的微波二极管

    公开(公告)号：US3731159A

    公开(公告)日：1973-05-01

    申请号：US3731159D

    申请日：1971-05-19

    Applicant: ANHEUSER BUSCH

    Inventor： MCCANN J

    IPC: H01L23/051 ,  H01L23/31 ,  H01L29/00 ,  H01L1/10 ,  H01L5/00 ,  H01L9/10

    CPC classification number: H01L23/3157 ,  H01L23/051 ,  H01L29/00 ,  H01L2924/0002 ,  H01L2924/01079 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/00

    Abstract: A microwave diode is packaged solely by contacts and a glass passivant layer adhered to the entire exterior surface of the diode mediate the contacts. The glass layer is of substantially uniform thickness of no less than one mil, exhibits a thermal coefficient of expansion in the range of from 2.6 to 4.8 X 10 6 in/in/*C and a dielectric constant in the range of from 6 to 18. The glass is in non-wetting association with the contacts.

    Abstract translation: 微波二极管仅由触点封装，并且粘附到二极管的整个外表面的玻璃钝化剂层介导触点。 玻璃层的厚度基本上不小于1密耳，表现出2.6〜4.8×10 -6 in / in /℃范围内的热膨胀系数，介电常数范围为 玻璃与触点不相关。

    Ceramic package for an integrated circuit
    50.
    发明授权
    Ceramic package for an integrated circuit 失效
    用于集成电路的陶瓷封装

    公开(公告)号：US3665592A

    公开(公告)日：1972-05-30

    申请号：US3665592D

    申请日：1970-03-18

    Applicant: VERNITRON CORP

    Inventor： APOSPORS NICK J

    IPC: H01L21/48 ,  H01L21/50 ,  H01L23/498 ,  B01J17/00 ,  H01L1/10

    CPC classification number: H01L21/50 ,  H01L21/4867 ,  H01L23/49861 ,  H01L2924/0002 ,  H01L2924/09701 ,  Y10T29/49121 ,  Y10T29/4913 ,  H01L2924/00

    Abstract: A ceramic package for an integrated circuit includes a ceramic plate having a central recess. A screened circuit pattern of spaced conductive stripes of molybdenum manganese is applied to the plate and fired to metallize it. A coating of aluminum oxide is applied over the plate and parts of the stripes and a ring of molybdenum manganese is placed on the coating to surround the recess and inner ends of the stripes. The ring is metalized and then a ''''Kovar'''' ring is brazed to the metalized ring. An integrated circuit chip is placed in the recess and covered by a cover hermetically bonded to the ring.

    Abstract translation: 用于集成电路的陶瓷封装包括具有中心凹部的陶瓷板。 将钼锰隔开的导电条纹的屏蔽电路图案施加到板上并烧制以使其金属化。 在板和部分条纹上施加氧化铝涂层，并且在涂层上放置钼锰环以围绕条的凹部和内端。 环被金属化，然后将“科瓦”环钎焊到金属化环。 一个集成电路芯片放置在凹槽中，被一个密封在环上的盖子覆盖。

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