公开(公告)号：US20140333459A1

公开(公告)日：2014-11-13

申请号：US14274813

申请日：2014-05-12

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Takashi OSHIMA ,  Tatsuji MATSUURA ,  Yuichi OKUDA ,  Hideo NAKANE ,  Takaya YAMAMOTO ,  Keisuke KIMURA

IPC: H03M1/10 ,  H03M1/00

CPC classification number: H03M1/1033 ,  H03M1/002 ,  H03M1/1052 ,  H03M1/12 ,  H03M1/201 ,  H03M1/44 ,  H03M1/46 ,  H03M1/66 ,  H03M1/745

Abstract: To compensate for non-linearity of an AD conversion unit and non-linearity of a DA conversion unit in an electronic system including the DA conversion unit and the AD conversion unit, an electronic system includes an A/D conversion unit, a D/A conversion unit, an AD conversion compensation unit, a DA conversion compensation unit, and a calibration unit. During a calibration operation period, the calibration unit sets an operating characteristic of the AD conversion compensation unit and an operating characteristic of the DA conversion compensation unit. The operating characteristic of the AD conversion compensation unit set during the calibration operation period compensates for non-linearity of AD conversion of the A/D conversion unit. The operating characteristic of the DA conversion compensation unit set during the calibration operation period compensates for non-linearity of DA conversion of the D/A conversion unit.

Abstract translation: 为了补偿包括DA转换单元和AD转换单元的电子系统中的AD转换单元的非线性和DA转换单元的非线性，电子系统包括A / D转换单元，D / A 转换单元，AD转换补偿单元，DA转换补偿单元和校准单元。 在校准操作期间，校准单元设定AD转换补偿单元的工作特性和DA转换补偿单元的工作特性。 在校准操作期间设定的AD转换补偿单元的工作特性补偿A / D转换单元的AD转换的非线性。 在校准操作期间设置的DA转换补偿单元的工作特性补偿D / A转换单元的DA转换的非线性。

公开(公告)号：US08659465B2

公开(公告)日：2014-02-25

申请号：US13293969

申请日：2011-11-10

Applicant: Laurent Simony ,  Benoît Deschamps ,  Alexandre Cellier ,  Frédéric Barbier

Inventor： Laurent Simony ,  Benoît Deschamps ,  Alexandre Cellier ,  Frédéric Barbier

IPC: H03M1/56

CPC classification number: H03M1/58 ,  H03M1/201 ,  H03M1/56

Abstract: A method of analog to digital voltage conversion including: generating a quadratic signal based on an analog time varying reference signal; generating a ramp signal based on the quadratic signal; and converting an analog input voltage to a digital output value based on a time duration determined by a comparison of the analog input voltage with the ramp signal.

Abstract translation: 一种模数电压转换方法，包括：基于模拟时变参考信号产生二次信号; 基于二次信号产生斜坡信号; 并且基于通过模拟输入电压与斜坡信号的比较确定的持续时间，将模拟输入电压转换为数字输出值。

公开(公告)号：US20130127650A1

公开(公告)日：2013-05-23

申请号：US13814205

申请日：2012-03-21

Applicant: Taiji Akizuki ,  Suguru Fujita

Inventor： Taiji Akizuki ,  Suguru Fujita

IPC: H03M1/20

CPC classification number: H03M1/20 ,  H03M1/201

Abstract: An A/D conversion device has means for generating a control clock signal having a cycle that is an integral multiple of a cycle of a reference clock signal; means for generating a shift voltage which varies every cycle of the reference clock signal while the cycle of the control clock signal is taken as one cycle, means for offsetting an analog signal by the shift voltage, means for A/D converting the offset analog signal every cycle of the reference clock signal signal, and means for averaging outputs from the A/D converter every cycle of the control clock signal.

Abstract translation: A / D转换装置具有用于产生具有作为参考时钟信号的周期的整数倍的周期的控制时钟信号的装置; 用于产生在控制时钟信号的周期作为一个周期的基准时钟信号的每个周期变化的移位电压的装置，用于通过移位电压偏移模拟信号的装置，用于对偏移模拟信号进行A / D转换的装置 参考时钟信号信号的每个周期，以及用于对来自A / D转换器的每个周期的控制时钟信号的输出进行平均的装置。

公开(公告)号：US20100214141A1

公开(公告)日：2010-08-26

申请号：US12656490

申请日：2010-02-01

Applicant: Tetsuhiro Koyama

Inventor： Tetsuhiro Koyama

IPC: H03M1/20

CPC classification number: H03M1/201 ,  H03M1/20 ,  H03M1/60

Abstract: There is provided an analog-to-digital converter capable of performing analog-to-digital conversion with good accuracy. The analog-to-digital converter in accordance with the present invention includes a dither generation circuit 11 which generates dither; an input polarity switching unit 1 which switches a polarity of an input signal; an integrator 2; an integrator output regulator circuit 5 which regulates an output voltage of the integrator 2; a window comparator 3; a control circuit 4 which uses the comparison result of the window comparator 3 to control the input polarity switching unit 1, the integrator output regulator circuit 5, and the window comparator 3 as well as to generate a digital signal. The dither generation circuit 11 generates dither in such a manner that a cycle in which the digital signal is read is an integral multiple of a dither cycle. Further, the dither generation circuit 11 generates dither in such a manner that the number of times the count value is generated in the first half of one cycle of the dither is different from the number of times the count value is generated in the second half cycle thereof.

Abstract translation: 提供了能够以高精度执行模数转换的模数转换器。 根据本发明的模拟 - 数字转换器包括产生抖动的抖动产生电路11; 输入极性切换单元1，其切换输入信号的极性; 积分器2; 积分器输出调节器电路5，其调节积分器2的输出电压; 窗口比较器3; 使用窗口比较器3的比较结果来控制输入极性切换单元1，积分器输出调节器电路5和窗口比较器3以及生成数字信号的控制电路4。 抖动产生电路11产生抖动，使得读取数字信号的周期是抖动周期的整数倍。 此外，抖动发生电路11产生抖动，使得在抖动的一个周期的前半部分中产生计数值的次数与在第二个半周期中产生计数值的次数不同 其中。

公开(公告)号：US07561085B2

公开(公告)日：2009-07-14

申请号：US11689377

申请日：2007-03-21

Applicant: Matthew P. Newlin ,  Lee K. Strandjord ,  Thomas C. Greening ,  Gregory W. Keith

Inventor： Matthew P. Newlin ,  Lee K. Strandjord ,  Thomas C. Greening ,  Gregory W. Keith

IPC: H03M1/20

CPC classification number: H03M1/0641 ,  G06F7/588 ,  H03M1/201 ,  H03M1/661

Abstract: Systems and methods for improving efficiency of a data converter. An example method generates a noise signal, alters the spectrum of the noise signal based on operation of an associated data converter, and supplies the altered spectrum noise signal to the associated data converter. The data converter is a digital-to-analog converter or an analog-to-digital converter. The altered spectrum noise signal is notched at frequencies of interest. The spectrum is altered by sending a signal generated by a random number generator to a delay device and adding the output of the delay device from the output of the random number generator. Also, the spectrum is altered by seeding first and second identical random number generators, delaying the operation of the first random number generator, and adding the output of the delayed first random number generator from the second random number generator.

Abstract translation: 提高数据转换器效率的系统和方法。 示例性方法产生噪声信号，基于相关联的数据转换器的操作改变噪声信号的频谱，并将改变的频谱噪声信号提供给相关联的数据转换器。 数据转换器是数模转换器或模数转换器。 改变的频谱噪声信号在感兴趣的频率处被切断。 通过将随机数发生器产生的信号发送到延迟装置并且从随机数发生器的输出添加延迟装置的输出来改变频谱。 此外，通过播种第一和第二相同的随机数发生器来改变频谱，延迟第一随机数发生器的操作，以及将来自第二随机数发生器的延迟的第一随机数发生器的输出相加。

公开(公告)号：US07075466B1

公开(公告)日：2006-07-11

申请号：US10851523

申请日：2004-05-20

Applicant: Neil Woodall ,  G. Finn Wredenhagen

Inventor： Neil Woodall ,  G. Finn Wredenhagen

IPC: H03M1/20

CPC classification number: H03M1/0629 ,  H03M1/201

Abstract: The present invention provides an ADC apparatus and method for improving effective bit resolution and suppressing digital reconstruction artifacts with an anti-aliasing filter and an over-sampled input. ADC resolution can be increased by combining a dither signal with a sampled signal and then after digitization, filtering out the dithered signal. Designing a notch in the filter corresponding to the attenuation frequency attenuates residual effects.

Abstract translation: 本发明提供了一种用于利用抗混叠滤波器和过采样输入来提高有效位分辨率并抑制数字重建伪影的ADC装置和方法。 可以通过将抖动信号与采样信号组合，然后在数字化之后，滤除抖动信号，可以提高ADC分辨率。 设计与衰减频率相对应的滤波器的陷波衰减残留效应。

公开(公告)号：US06879273B2

公开(公告)日：2005-04-12

申请号：US10669280

申请日：2003-09-23

Applicant: Andreas Wiesbauer ,  Martin Clara ,  Thomas Pötscher ,  Hubert Weinberger ,  Jörg Hauptmann ,  Thomas Magesacher

Inventor： Andreas Wiesbauer ,  Martin Clara ,  Thomas Pötscher ,  Hubert Weinberger ,  Jörg Hauptmann ,  Thomas Magesacher

IPC: H03M1/00 ,  H03M1/20 ,  H03M1/66 ,  H03M3/00 ,  H04B14/04 ,  H04B14/06

CPC classification number: H03M1/66 ,  H03M1/201 ,  H03M3/33 ,  H03M3/458 ,  H03M3/50

Abstract: The invention creates a method and a device for digitally transmitting analog signals, in which oversampling is performed in analog/digital and digital/analog converters. In this arrangement, a digital/analog conversion is performed which, in particular, is suitable for VDSL systems. A transmitted digital transmission signal (110) is supplied to a mixing unit (201) and in the mixing unit (201), a receive noise signal (211) applied to a receive noise source terminal (209) is superimposed on the digital transmission signal (110). An interpolation filter unit (203), in combination with a subsequent noise shaping device (205), provides an increase in the frequency bandwidth, resulting in suitable oversampling.

Abstract translation: 本发明创建了一种用于数字传输模拟信号的方法和装置，其中在模拟/数字和数字/模拟转换器中执行过采样。 在这种布置中，执行数字/模拟转换，其特别适用于VDSL系统。 传输的数字传输信号（110）被提供给混合单元（201）并且在混合单元（201）中，施加到接收噪声源终端（209）的接收噪声信号（211）被叠加在数字传输信号 （110）。 与随后的噪声整形装置（205）组合的内插滤波器单元（203）提供频率带宽的增加，从而导致合适的过采样。

公开(公告)号：US5305005A

公开(公告)日：1994-04-19

申请号：US897152

申请日：1992-06-11

Applicant: Shiro Nakagawa ,  Atsuko Tsuchida ,  Eiji Takahashi

Inventor： Shiro Nakagawa ,  Atsuko Tsuchida ,  Eiji Takahashi

IPC: H03M1/20

CPC classification number: H03M1/201

Abstract: An A/D converter system has an A/D converter element (10) which provides a first predetermined number of digital output bits for each input analog signal. An addition device (12,70) adds linear slope potential to the input analog signal. A calculator (14) provides an average of a plurality of digital output signals of the A/D converter element so that the average has larger number of bits than the first predetermined number. The addition device is implemented by a time constant circuit (70) which functions as an integral circuit for an input analog signal, and functions as a differential circuit for a slope potential.

Abstract translation: A / D转换器系统具有A / D转换器元件（10），其为每个输入模拟信号提供第一预定数量的数字输出位。 加法装置（12,70）向输入的模拟信号增加线性斜率电位。 计算器（14）提供A / D转换器元件的多个数字输出信号的平均值，使得平均值具有比第一预定数量更大的比特数。 添加装置由用作输入模拟信号的积分电路的时间常数电路（70）实现，并且用作用于斜率电位的差分电路。

公开(公告)号：US5250948A

公开(公告)日：1993-10-05

申请号：US810230

申请日：1991-12-19

Applicant: Lawrence J. Berstein ,  Kenneth A. Parulski

Inventor： Lawrence J. Berstein ,  Kenneth A. Parulski

IPC: H03M1/18 ,  H03M1/20 ,  H03M1/62 ,  H03M1/06

CPC classification number: H03M1/201 ,  H03M1/188

Abstract: A dual range A/D converter includes means for appending a predetermined number N of random noise bits to the N least significant bits of the digital signals output from one of the dual A/D converters, thereby providing a total output bit resolution that is independent of the input analog signal.

Abstract translation: 双范围A / D转换器包括用于将预定数量N个随机噪声比特附加到从双A / D转换器之一输出的数字信号的N个最低有效位中的装置，从而提供独立的总输出位分辨率 的输入模拟信号。

公开(公告)号：US5187481A

公开(公告)日：1993-02-16

申请号：US817710

申请日：1992-01-07

Applicant: Donald R. Hiller

Inventor： Donald R. Hiller

IPC: H03M1/04 ,  G06F17/15 ,  H03H21/00 ,  H03M1/06 ,  H03M1/10 ,  H03M1/12 ,  H03M1/14 ,  H03M1/20

CPC classification number: H03M1/0641 ,  H03H21/0012 ,  H03M1/201 ,  H03M1/0604 ,  H03M1/1215 ,  H03M1/144

Abstract: A circuit for analog-to-digital conversion is disclosed comprising multiplexed ADCs. Dithering is introduced into the circuit before conversion and subtracted out of the resulting digital output stream. Gain control feedback loops are employed to eliminate non-unity gain error of the dither signal and multiplexed ADC differential gain errors. Correlation between the digital output stream and the dither signal is used to detect a non-unity condition and derive gain control feedback. Correlation with the dither signal is also used to detect gain differences between multiplexed ADCs and generate corrective feedback.

Abstract translation: 公开了用于模数转换的电路，其包括多路复用ADC。 在转换之前将抖动引入电路，并将其从所得到的数字输出流中减去。 采用增益控制反馈环来消除抖动信号的非单位增益误差和多路复用ADC差分增益误差。 使用数字输出流和抖动信号之间的相关性来检测非单位条件并导出增益控制反馈。 与抖动信号的相关性也用于检测复用ADC之间的增益差异并产生校正反馈。