公开(公告)号：US20150042383A1

公开(公告)日：2015-02-12

申请号：US14456995

申请日：2014-08-11

Applicant: Samsung Display Co., Ltd. ,  Industry-University Cooperation Foundation Hanyang-University

Inventor： Oh-Kyong Kwon ,  Yeong-Keun Kwon ,  Jong-Hee Kim ,  Ji-Sun Kim ,  Jae-Keun Lim ,  Chong-Chul Chai

IPC: G09G3/14 ,  H03K17/687

CPC classification number: H03K17/687 ,  G09G3/3266 ,  G09G2310/0286 ,  G09G2310/06 ,  G11C19/184 ,  G11C19/28

Abstract: A stage circuit includes a first driver, a second driver, a first output unit and a second output unit. The first driver controls voltages of first and second nodes, according to a first power source, a start signal or a carry signal of a previous stage supplied to a first input terminal, a first clock signal supplied to a second input terminal, and a second clock signal supplied to a third input terminal. The second driver controls a voltage of a third node, according to the first power source, a start signal or a carry signal of a previous stage supplied to a first input terminal, a carry signal of a next stage supplied to a fourth input terminal, and the voltage of the second node.

Abstract translation: 舞台电路包括第一驱动器，第二驱动器，第一输出单元和第二输出单元。 第一驱动器根据第一电源，提供给第一输入端的前一级的起始信号或进位信号，提供给第二输入端的第一时钟信号和第二驱动器控制第一和第二节点的电压， 提供给第三输入端的时钟信号。 第二驱动器根据第一电源控制第三节点的电压，提供给第一输入端的先前级的起始信号或进位信号，提供给第四输入端的下一级的进位信号， 和第二节点的电压。

公开(公告)号：US08759834B2

公开(公告)日：2014-06-24

申请号：US13947459

申请日：2013-07-22

Applicant: Samsung Display Co., Ltd.

Inventor： Joo-Ae Youn ,  Yang-Ho Bae ,  Chang-Oh Jeong ,  Chong-Chul Chai ,  Pil-Sang Yun ,  Hong Long Ning ,  Byeong-Beom Kim

IPC: H01L21/33

CPC classification number: H01L33/0041 ,  H01L27/124 ,  H01L29/458

Abstract: A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.

Abstract translation: 显示面板包括： 下栅极线，基本上垂直于下栅极线设置的下数据线，连接到下栅极线和下数据线的薄膜晶体管（“TFT”），设置在下栅极线上的绝缘层， 下数据线和TFT，并且具有暴露下栅极线和下数据线的多个沟槽，设置在下栅极线上的沟槽中的上栅极线，设置在下数据上的沟槽中的上数据线 线和与TFT连接的像素电极。

公开(公告)号：US20140043066A1

公开(公告)日：2014-02-13

申请号：US14057354

申请日：2013-10-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Soo-Wan Yoon ,  Yeong-Keun Kwon ,  Ji-Sun Kim ,  Young-Soo Yoon ,  Chong-Chul Chai

IPC: H03K3/012

CPC classification number: H03K3/012 ,  G09G3/3674 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/184 ,  G11C19/28

Abstract: A gate driving circuit includes a pull-up control part, a pull-up part, a carry part, a first pull-down part and a second pull-down part. The pull-up control part applies a carry signal from a previous stage to a first node. The pull-up part outputs an N-th gate output signal based on a clock signal. The carry part outputs an N-th carry signal based on the clock signal in response to the signal applied to the first node. The first pull-down part includes a plurality of transistors connected to each other in series. The first pull-down part pulls down a signal at the first node to a second off voltage in response to a carry signal of a next stage. The second pull-down part pulls down the N-th gate output signal to a first off voltage in response to the carry signal of the next stage.

Abstract translation: 栅极驱动电路包括上拉控制部分，上拉部分，携带部分，第一下拉部分和第二下拉部分。 上拉控制部分将来自前一级的进位信号应用于第一节点。 上拉部分基于时钟信号输出第N个栅极输出信号。 进位部分响应于施加到第一节点的信号，基于时钟信号输出第N个进位信号。 第一下拉部分包括彼此串联连接的多个晶体管。 第一下拉部分响应于下一级的进位信号将第一节点处的信号拉低至第二截止电压。 第二下拉部分响应于下一级的进位信号将第N栅极输出信号拉低至第一关断电压。

公开(公告)号：US11957034B2

公开(公告)日：2024-04-09

申请号：US17290732

申请日：2019-09-24

Applicant: Samsung Display Co., Ltd.

Inventor： Min-Jae Jeong ,  Jae-Yong Jang ,  Gyung-Soon Park ,  Kyung-Hoon Chung ,  Chong-Chul Chai

IPC: H01L27/32 ,  H10K59/126 ,  H10K59/131 ,  H10K59/88

CPC classification number: H10K59/88 ,  H10K59/126 ,  H10K59/131

Abstract: A display apparatus includes a base substrate including a display region and a peripheral region that is a non-display region surrounding the display region, a plurality of data lines disposed in the display region on the base substrate and extending to the peripheral region, a bypass data line disposed in the display region and the peripheral region on the base substrate and electrically connected to at least one of the data lines, and a dummy pattern spaced apart from the bypass data line and disposed on a same layer as the bypass data line.

公开(公告)号：US11328667B2

公开(公告)日：2022-05-10

申请号：US17313471

申请日：2021-05-06

Applicant: Samsung Display Co., LTD.

Inventor： Jun-Hyun Park ,  Young-Wan Seo ,  An-Su Lee ,  Bo-Yong Chung ,  Kang-Moon Jo ,  Chong-Chul Chai

IPC: G09G3/3233 ,  H01L51/52 ,  G09G3/3258 ,  H01L27/32

Abstract: A display panel driver drives pixels based on first power having at least three voltage levels, second power having a constant voltage, and third power having two voltage levels. Each pixel includes a first transistor connected between first and second nodes and including a gate electrode to receive a scan signal, a second transistor connected between the second node and a third node in series with the first transistor and including a gate electrode to receive the third power, and a driving transistor connected between a source of the first power and the third node and including a gate electrode connected to the first electrode to control a driving current for an organic light emitting diode. A first capacitor is connected between a source of the third power and the first node, and a second capacitor is connected between the second node and one of the data lines.

公开(公告)号：US10964267B2

公开(公告)日：2021-03-30

申请号：US16877816

申请日：2020-05-19

Applicant: Samsung Display Co., LTD.

Inventor： Jun-Hyun Park ,  Young-Wan Seo ,  An-Su Lee ,  Bo-Yong Chung ,  Kang-Moon Jo ,  Chong-Chul Chai

IPC: G09G3/3258 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3275

Abstract: A pixel includes first, second, and third transistors, first and second capacitors, and an organic light emitting diode. The first transistor has a gate electrode connected to a first node, a first electrode that receives a first power voltage, and a second electrode connected to a second node. The second transistor has a gate electrode that receives a scan signal, a first electrode connected to the first node, and a second electrode connected to a third node. The third transistor has a gate electrode that receives a common control signal, a first electrode connected to the third node, and a second electrode connected to the second node. The organic light emitting diode has a first electrode connected to the second node and a second electrode that receives a second power voltage.

公开(公告)号：US10733938B2

公开(公告)日：2020-08-04

申请号：US16391142

申请日：2019-04-22

Applicant: Samsung Display Co., Ltd. ,  Industry-University Cooperation Foundation Hanyang University

Inventor： Chong-Chul Chai ,  Oh-Kyong Kwon ,  Nack-Hyeon Keum ,  Kyong-Hwan Oh ,  Young-Wan Seo ,  Yong-Koo Her ,  In-Jae Hwang

IPC: G09G3/3258 ,  G09G3/3233 ,  G09G3/3266

Abstract: A display apparatus includes a plurality of pixels. A pixel includes a first capacitor connected between a first voltage line receiving a first driving signal and a first node, a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal and a second electrode connected to a second node, an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal, a second capacitor connected between an m-th data line and the second node (wherein, ‘m’ is a natural number) and a second transistor comprising a control electrode connected to an n-th scan line (wherein, ‘n’ is a natural number), a first electrode connected to the first node and a second electrode connected to the second node.

公开(公告)号：US10665166B2

公开(公告)日：2020-05-26

申请号：US15726472

申请日：2017-10-06

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun-Hyun Park ,  Young-Wan Seo ,  An-Su Lee ,  Bo-Yong Chung ,  Kang-Moon Jo ,  Chong-Chul Chai

IPC: G09G3/3258 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3275

Abstract: A pixel for a display panel includes first and second transistors, first and second capacitors, and an organic light emitting diode. The first transistor has a gate electrode connected to a first node, a first electrode connected to a first power source, and a second electrode connected to a second node. The second transistor has a gate electrode connected to a scan line, a first electrode connected to the first node, and a second electrode connected to the second node. The organic light emitting diode has a first electrode connected to the second node and a second electrode connected to a second power source. The first capacitor has a first electrode connected to a third power source and a second electrode connected to the first node. The second capacitor has a first electrode connected to a data line and a second electrode connected to the second node.

公开(公告)号：US10410578B2

公开(公告)日：2019-09-10

申请号：US14789334

申请日：2015-07-01

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hee-Rim Song ,  Yong-Koo Her ,  Mu-Kyung Jeon ,  Jong-Hee Kim ,  Chong-Chul Chai

IPC: G09G3/3233 ,  G09G3/3291 ,  H01L51/52

Abstract: An organic light emitting display device includes a plurality of pixel columns, a first data wiring, a second data wiring, and a power supply wiring. The pixel columns include pixels repeatedly arranged in a first direction, and the pixel columns are repeatedly arranged in a second direction. The first and second directions are substantially perpendicular to each other. The first data wiring extends in the first direction and is connected to the pixels in an even row. The second data wiring extends in the first direction and are connected to the pixels in an odd row. The power supply wiring extends in the first direction between the first and second data wirings.

公开(公告)号：US09479156B2

公开(公告)日：2016-10-25

申请号：US14312139

申请日：2014-06-23

Applicant: Samsung Display Co., Ltd. ,  Industry-University Cooperation Foundation Hanyang University

Inventor： Oh-Kyong Kwon ,  Yeong-Keun Kwon ,  Jong-Hee Kim ,  Ji-Sun Kim ,  Jae-Keun Lim ,  Chong-Chul Chai

IPC: G09G3/36 ,  H03K17/30 ,  G11C19/28

CPC classification number: H03K17/302 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2320/0219 ,  G09G2320/043 ,  G11C19/28

Abstract: A gate driver, including multiple stages of gate driving circuits, wherein each stage of the gate driving circuits includes an input part configured to generate a Q node signal in response to a carry signal of one of previous stages and a clock signal, the Q node signal being applied to Q node, an output part configured to output a gate output signal to a gate output terminal in response to the Q node signal, and a charge sharing part connected to the gate output terminal of a present stage and a gate output terminal of one of next stages, the charge sharing part configured to operate charge-sharing between the gate output signal of the present stage and a gate output signal of one of the next stages in response to a select signal.

Abstract translation: 一种栅极驱动器，包括多级栅极驱动电路，其中栅极驱动电路的每一级包括被配置为响应于先前级之一的进位信号和时钟信号而生成Q结点信号的输入部分，Q节点 信号被施加到Q节点，输出部分被配置为响应于Q节点信号将栅极输出信号输出到栅极输出端子，以及电荷共享部分连接到当前级的栅极输出端子和栅极输出端子 电荷共享部件被配置为响应于选择信号在当前级的栅极输出信号和下一级之一的栅极输出信号之间进行电荷共享。