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公开(公告)号:US11755895B2
公开(公告)日:2023-09-12
申请号:US17520919
申请日:2021-11-08
Applicant: Google LLC
Inventor: Jonathan Ross , Gregory Michael Thorson
CPC classification number: G06N3/063 , G06F15/8046 , G06N3/045 , G06N3/08 , G06N5/04
Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for computing a layer output for a convolutional neural network layer, the method comprising: receiving a plurality of activation inputs; forming a plurality of vector inputs from the plurality of activation inputs, each vector input comprising values from a distinct region within the multi-dimensional matrix; sending the plurality of vector inputs to one or more cells along a first dimension of the systolic array; generating a plurality of rotated kernel structures from each of the plurality of kernel; sending each kernel structure and each rotated kernel structure to one or more cells along a second dimension of the systolic array; causing the systolic array to generate an accumulated output based on the plurality of value inputs and the plurality of kernels; and generating the layer output from the accumulated output.
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公开(公告)号:US11586920B2
公开(公告)日:2023-02-21
申请号:US16915161
申请日:2020-06-29
Applicant: Google LLC
Inventor: Jonathan Ross , Norman Paul Jouppi , Andrew Everett Phelps , Reginald Clifford Young , Thomas Norrie , Gregory Michael Thorson , Dan Luu
Abstract: A circuit for performing neural network computations for a neural network comprising a plurality of neural network layers, the circuit comprising: a matrix computation unit configured to, for each of the plurality of neural network layers: receive a plurality of weight inputs and a plurality of activation inputs for the neural network layer, and generate a plurality of accumulated values based on the plurality of weight inputs and the plurality of activation inputs; and a vector computation unit communicatively coupled to the matrix computation unit and configured to, for each of the plurality of neural network layers: apply an activation function to each accumulated value generated by the matrix computation unit to generate a plurality of activated values for the neural network layer.
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公开(公告)号:US20210312011A1
公开(公告)日:2021-10-07
申请号:US17208214
申请日:2021-03-22
Applicant: Google LLC
Inventor: Dong Hyuk Woo , Gregory Michael Thorson , Andrew Everett Phelps , Olivier Temam , Jonathan Ross , Christopher Aaron Clark
Abstract: A circuit comprises an input register configured to receive an input vector of elements, a control register configured to receive a control vector of elements, wherein each element of the control vector corresponds to a respective element of the input vector, and wherein each element specifies a permutation of a corresponding element of the input vector, and a permute execution circuit configured to generate an output vector of elements corresponding to a permutation of the input vector. Generating each element of the output vector comprises accessing, at the input register, a particular element of the input vector, accessing, at the control register, a particular element of the control vector corresponding to the particular element of the input vector, and outputting the particular element of the input vector as an element at a particular position of the output vector that is selected based on the particular element of the control vector.
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公开(公告)号:US11138522B1
公开(公告)日:2021-10-05
申请号:US16827376
申请日:2020-03-23
Applicant: Google LLC
Inventor: Jonathan Ross , John Michael Stivoric
Abstract: A method for allocating resources for a machine learning model is disclosed. A machine learning model to be executed on a special purpose machine learning model processor is received. A computational data graph is generated from the machine learning model. The computational dataflow graph represents the machine learning model which includes nodes, connector directed edges, and parameter directed edges. The operations of the computational dataflow graph is scheduled and then compiled using a deterministic instruction set architecture that specifies functionality of a special purpose machine learning model processor. An amount of resources required to execute the computational dataflow graph is determined. Resources are allocated based on the determined amounts of resources required to execute the machine learning model represented by the computational dataflow graph.
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公开(公告)号:US20210165635A1
公开(公告)日:2021-06-03
申请号:US17175559
申请日:2021-02-12
Applicant: Google LLC
Inventor: Jonathan Ross , Robert David Nuckolls , Christopher Aaron Clark , Chester Li , Gregory Michael Thorson
Abstract: A circuit for transposing a matrix comprising reversal circuitry configured, for each of one or more diagonals of the matrix, to receive elements of the matrix in a first vector and generate a second vector that includes the elements of the matrix in an order that is a reverse of an order of the elements of the matrix in the first vector, and rotation circuitry configured, for each of the one or more diagonals of the matrix, to determine a number of positions by which to rotate the elements of the matrix in the second vector, receive the second vector of elements of the matrix, and generate a third vector that includes the elements of the matrix in the second vector in an order that is a rotation of the elements of the matrix in the second vector by the determined number of positions.
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公开(公告)号:US10810483B2
公开(公告)日:2020-10-20
申请号:US16717341
申请日:2019-12-17
Applicant: Google LLC
Inventor: Reginald Clifford Young , Jonathan Ross
Abstract: Methods, systems, and apparatus for efficiently performing a computation of a convolutional neural network layer. One of the methods includes transforming a X by Y by Z input tensor into a X′ by Y′ by Z′ input tensor; obtaining one or more modified weight matrices, wherein the modified weight matrices operate on the X′ by Y′ by Z′ input tensor to generate a U′ by V′ by W′ output tensor, and the U′ by V′ by W′ output tensor comprises a transformed U by V by W output tensor; and processing the X′ by Y′ by Z′ input tensor using the modified weight matrices to generate the U′ by V′ by W′ output tensor, wherein the U′ by V′ by W′ output tensor comprises the U by V by W output tensor.
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公开(公告)号:US20200250520A1
公开(公告)日:2020-08-06
申请号:US16857808
申请日:2020-04-24
Applicant: Google LLC
Inventor: Jonathan Ross , Gregory Michael Thorson
Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for computing a layer output for a convolutional neural network layer, the method comprising: receiving a plurality of activation inputs; forming a plurality of vector inputs from the plurality of activation inputs, each vector input comprising values from a distinct region within the multi-dimensional matrix; sending the plurality of vector inputs to one or more cells along a first dimension of the systolic array; generating a plurality of rotated kernel structures from each of the plurality of kernel; sending each kernel structure and each rotated kernel structure to one or more cells along a second dimension of the systolic array; causing the systolic array to generate an accumulated output based on the plurality of value inputs and the plurality of kernels; and generating the layer output from the accumulated output.
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公开(公告)号:US10699188B2
公开(公告)日:2020-06-30
申请号:US15686615
申请日:2017-08-25
Applicant: Google LLC
Inventor: Jonathan Ross , Norman Paul Jouppi , Andrew Everett Phelps , Reginald Clifford Young , Thomas Norrie , Gregory Michael Thorson , Dan Luu
Abstract: A circuit for performing neural network computations for a neural network comprising a plurality of neural network layers, the circuit comprising: a matrix computation unit configured to, for each of the plurality of neural network layers: receive a plurality of weight inputs and a plurality of activation inputs for the neural network layer, and generate a plurality of accumulated values based on the plurality of weight inputs and the plurality of activation inputs; and a vector computation unit communicatively coupled to the matrix computation unit and configured to, for each of the plurality of neural network layers: apply an activation function to each accumulated value generated by the matrix computation unit to generate a plurality of activated values for the neural network layer.
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公开(公告)号:US10592583B2
公开(公告)日:2020-03-17
申请号:US16283913
申请日:2019-02-25
Applicant: Google LLC
Inventor: Dong Hyuk Woo , Gregory Michael Thorson , Andrew Everett Phelps , Olivier Temam , Jonathan Ross , Christopher Aaron Clark
Abstract: A circuit comprises an input register configured to receive an input vector of elements, a control register configured to receive a control vector of elements, wherein each element of the control vector corresponds to a respective element of the input vector, and wherein each element specifies a permutation of a corresponding element of the input vector, and a permute execution circuit configured to generate an output vector of elements corresponding to a permutation of the input vector. Generating each element of the output vector comprises accessing, at the input register, a particular element of the input vector, accessing, at the control register, a particular element of the control vector corresponding to the particular element of the input vector, and outputting the particular element of the input vector as an element at a particular position of the output vector that is selected based on the particular element of the control vector.
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公开(公告)号:US20190354570A1
公开(公告)日:2019-11-21
申请号:US16528826
申请日:2019-08-01
Applicant: Google LLC
Inventor: Dong Hyuk Woo , Gregory Michael Thorson , Andrew Everett Phelps , Olivier Temam , Jonathan Ross , Christopher Aaron Clark
Abstract: A circuit comprises an input register configured to receive an input vector of elements, a control register configured to receive a control vector of elements, wherein each element of the control vector corresponds to a respective element of the input vector, and wherein each element specifies a permutation of a corresponding element of the input vector, and a permute execution circuit configured to generate an output vector of elements corresponding to a permutation of the input vector. Generating each element of the output vector comprises accessing, at the input register, a particular element of the input vector, accessing, at the control register, a particular element of the control vector corresponding to the particular element of the input vector, and outputting the particular element of the input vector as an element at a particular position of the output vector that is selected based on the particular element of the control vector.
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