公开(公告)号：US20160163611A1

公开(公告)日：2016-06-09

申请号：US14558864

申请日：2014-12-03

Applicant: International Business Machines Corporation

Inventor： Edmund Blackshear ,  Shidong Li

IPC: H01L23/14 ,  B32B15/092 ,  B32B27/06 ,  H01L23/13 ,  B32B37/14 ,  B32B38/00 ,  H01L21/48 ,  B32B3/26 ,  B32B27/38

CPC classification number: H01L23/49833 ,  B32B3/08 ,  B32B3/10 ,  B32B3/266 ,  B32B5/16 ,  B32B7/02 ,  B32B15/092 ,  B32B15/20 ,  B32B27/04 ,  B32B27/20 ,  B32B27/38 ,  B32B37/02 ,  B32B37/182 ,  B32B38/0004 ,  B32B2250/05 ,  B32B2250/40 ,  B32B2260/046 ,  B32B2262/101 ,  B32B2264/10 ,  B32B2264/101 ,  B32B2307/202 ,  B32B2307/204 ,  B32B2307/734 ,  B32B2363/00 ,  B32B2457/00 ,  B32B2457/14 ,  H01L21/4803 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L2924/0002 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K2201/0137 ,  H05K2201/0191 ,  H05K2201/0206 ,  H05K2201/0209 ,  H05K2201/09136 ,  H05K2201/09209 ,  H05K2201/0929 ,  H05K2203/06 ,  H05K2203/061 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T428/24298 ,  Y10T428/24314 ,  Y10T428/24322 ,  Y10T428/24331 ,  Y10T428/25 ,  H01L2924/00

Abstract: A laminate substrate for receiving a semiconductor chip. Included are laminate layers stacked to form the laminate substrate, each laminate layer includes a core that includes particle-filled epoxy and a metallic layer on the core. At least one laminate layer has a radial cut through the metallic layer, the radial cut extending from a periphery of the at least one laminate layer towards a center of the at least one laminate layer. The radial cut cuts only through the metallic layer and does not cut through the core.

Abstract translation: 一种用于接收半导体芯片的层叠基板。 包括层叠层叠以形成层压基板的层压层，每个层压层包括芯，其包括颗粒填充的环氧树脂和芯上的金属层。 至少一个层压层具有穿过金属层的径向切口，径向切口从至少一层压层的周边延伸到至少一层压层的中心。 径向切割仅穿过金属层，并且不切穿芯。

公开(公告)号：US20160081184A1

公开(公告)日：2016-03-17

申请号：US14947831

申请日：2015-11-20

Applicant: FUJIFILM CORPORATION

Inventor： Kensuke KATAGIRI ,  Shin TAJIRI ,  Akihiko HASE

IPC: H05K1/02 ,  H05K3/10

CPC classification number: H05K1/09 ,  G06F3/041 ,  G06F3/044 ,  G06F3/045 ,  G09F9/00 ,  H01B1/02 ,  H01L51/0021 ,  H01L51/5212 ,  H05K1/0296 ,  H05K3/027 ,  H05K3/10 ,  H05K2201/0364 ,  H05K2201/09209 ,  H05K2203/0502 ,  Y10T29/49155

Abstract: A transparent conductive film comprises a transparent substrate and a metal wiring portion formed thereon. A thin metal wire contained in an electrode portion in the metal wiring portion has a surface shape satisfying the condition of Ra2/Sm>0.01 μm and has a metal volume content of 35% or more. Ra represents an arithmetic average roughness in micrometers and is equal to or smaller than the thickness of a metal wiring located in a position where the surface roughness is measured. Sm represents an average distance between convex portions and is 0.01 μm or more.

Abstract translation: 透明导电膜包括透明基板和形成在其上的金属布线部分。 包含在金属配线部的电极部的细金属丝具有满足Ra2 / Sm>0.01μm的条件的表面形状，金属体积含量为35％以上。 Ra表示以微米为单位的算术平均粗糙度，并且等于或小于位于测量表面粗糙度的位置的金属布线的厚度。 Sm表示凸部之间的平均距离，为0.01μm以上。

公开(公告)号：US09277642B2

公开(公告)日：2016-03-01

申请号：US14012216

申请日：2013-08-28

Applicant: Eastman Kodak Company

Inventor： Ronald Steven Cok

IPC: H05K1/02 ,  H05K3/46 ,  H05K3/12 ,  H05K3/00 ,  H05K1/09

CPC classification number: H05K1/0274 ,  H05K1/0298 ,  H05K1/097 ,  H05K3/0041 ,  H05K3/12 ,  H05K3/1258 ,  H05K3/1275 ,  H05K3/1283 ,  H05K3/1291 ,  H05K3/465 ,  H05K3/4685 ,  H05K2201/09209 ,  H05K2201/09281 ,  H05K2201/0979 ,  H05K2201/09845 ,  H05K2203/0108

Abstract: A method of making an imprinted micro-wire structure includes providing a substrate having an edge area and a central area separate from the edge area and providing first, second, and third different stamps. A curable bottom, connecting layer, and top layer are formed on the substrate. A bottom-layer micro-channel is imprinted in the bottom layer in the central area and the edge area, a connecting-layer micro-channel is imprinted in the connecting layer in the edge area over the bottom-layer micro-channel, an edge micro-channel is imprinted in the top layer in the edge area over the connecting-layer micro-channel, and top-layer micro-channels are imprinted in the top layer over the central area. Micro-wires are formed in each micro-channel. The bottom-layer micro-wire in the central area is electrically connected to the edge micro-wire in the edge area and is electrically isolated from the top-layer micro-wire.

Abstract translation: 制造压印微线结构的方法包括提供具有与边缘区域分离的边缘区域和中心区域的基板，并提供第一，第二和第三不同的邮票。 在基板上形成可固化的底部，连接层和顶层。 底层微通道印在中心区域和边缘区域的底层中，连接层微通道被压印在底层微通道上的边缘区域中的连接层中，边缘 微通道印在连接层微通道上的边缘区域的顶层中，顶层微通道印在中心区域的顶层中。 微线形成在每个微通道中。 中心区域的底层微线电连接到边缘区域中的边缘微线，并与顶层微线电隔离。

公开(公告)号：US09215798B2

公开(公告)日：2015-12-15

申请号：US14012173

申请日：2013-08-28

Applicant: Ronald Steven Cok

Inventor： Ronald Steven Cok

IPC: H01B13/00 ,  H05K1/02 ,  H05K3/46 ,  H05K3/12 ,  H05K3/00 ,  H05K1/09

CPC classification number: H05K1/0274 ,  H05K1/0298 ,  H05K1/097 ,  H05K3/0041 ,  H05K3/12 ,  H05K3/1258 ,  H05K3/1275 ,  H05K3/1283 ,  H05K3/1291 ,  H05K3/465 ,  H05K3/4685 ,  H05K2201/09209 ,  H05K2201/09281 ,  H05K2201/0979 ,  H05K2201/09845 ,  H05K2203/0108

Abstract: A method of making an imprinted micro-wire structure includes providing a substrate, a first stamp, and a different multi-level second stamp. A curable bottom layer is provided over the substrate. One or more bottom-layer micro-channel(s) are imprinted in the curable bottom layer with the first stamp and a bottom-layer micro-wire formed in each bottom-layer micro-channel. A curable multi-layer is formed adjacent to and in contact with the cured bottom layer. First and second multi-layer micro-channels and a top-layer micro-channel are imprinted in the curable multi-layer with the multi-level second stamp. Either two bottom-layer micro-wires are electrically connected through the first and second multi-layer micro-wires and a top-layer micro-wire or two top-layer micro-wires are electrically connected through the first and second multi-layer micro-wires and a bottom-layer micro-wire.

Abstract translation: 制造压印微线结构的方法包括提供衬底，第一印模和不同的多级第二印模。 在基板上设置可固化的底层。 一个或多个底层微通道被印刷在可固化底层中，第一印模和底层微线形成在每个底层微通道中。 在固化的底层附近形成可固化的多层，并且与固化的底层接触。 第一和第二多层微通道和顶层微通道用多级第二印记印在可固化多层中。 两个底层微电线通过第一和第二多层微线电连接，并且顶层微线或两个顶层微线通过第一和第二多层微电子电连接 电线和底层微线。

公开(公告)号：US09101056B2

公开(公告)日：2015-08-04

申请号：US14012240

申请日：2013-08-28

Applicant: Eastman Kodak Company

Inventor： Ronald Steven Cok

IPC: H01B13/00 ,  H05K1/02 ,  H05K3/46 ,  H05K3/12 ,  H05K3/00 ,  H05K1/09

CPC classification number: H05K1/0274 ,  H05K1/0298 ,  H05K1/097 ,  H05K3/0041 ,  H05K3/12 ,  H05K3/1258 ,  H05K3/1275 ,  H05K3/1283 ,  H05K3/1291 ,  H05K3/465 ,  H05K3/4685 ,  H05K2201/09209 ,  H05K2201/09281 ,  H05K2201/0979 ,  H05K2201/09845 ,  H05K2203/0108

Abstract: A method of making an imprinted micro-wire structure includes providing a substrate having an edge area and a central area separate from the edge area and providing a first stamp and a multi-level second stamp. A curable bottom layer and multi-layer are provided on the substrate. A bottom-layer micro-channel is imprinted in the bottom layer. A multi-layer micro-channel and a top-layer micro-channel are imprinted in the multi-layer. Micro-wires are formed in each micro-channel. The bottom-layer micro-wire extends from the central area into the edge area. The multi-layer micro-wire contacts the bottom-layer micro-wire in the edge area. The top-layer micro-wire is over the central area and is separate from the multi-layer micro-wire and the bottom-layer micro-channel. The bottom-layer micro-wire is electrically connected to the multi-layer micro-wire and is electrically isolated from the top-layer micro-wire.

Abstract translation: 制造压印微线结构的方法包括提供具有与边缘区域分离的边缘区域和中心区域的基板，并提供第一印模和多级第二印模。 在基板上设置有可固化的底层和多层。 底层微通道印在底层中。 多层微通道和顶层微通道印在多层中。 微线形成在每个微通道中。 底层微线从中心区域延伸到边缘区域。 多层微线接触边缘区域的底层微线。 顶层微线在中心区域之上，与多层微线和底层微通道分离。 底层微线电连接到多层微线，并与顶层微线电隔离。

公开(公告)号：US20140225152A1

公开(公告)日：2014-08-14

申请号：US14257099

申请日：2014-04-21

Applicant: Panasonic Corporation

Inventor： Toshiyuki ASAHI ,  Naoyuki TANI ,  Yoshito KITAGAWA ,  Yuta OKAZAKI

IPC: H01L33/62 ,  H05K1/02

CPC classification number: H01L33/62 ,  H01L23/49838 ,  H01L23/49861 ,  H01L23/49894 ,  H01L24/97 ,  H01L33/647 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/07802 ,  H01L2924/12035 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15787 ,  H05K1/0204 ,  H05K1/0296 ,  H05K2201/09209 ,  H05K2201/10106 ,  H01L2924/00 ,  H01L2924/01005

Abstract: A wiring board includes a base in which plate wirings formed of a metal plate are integrally formed with an insulating portion made of resin or a resin composition and surface wirings electrically connected to the plate wirings. The base has first and second surfaces on which the surface wirings are formed. The surface wirings are thinner than the plate wirings, and the minimum wiring gap between the surface wirings is smaller than the minimum wiring gap between the plate wirings. One of the plate wirings has substantially the same shape as that of a region where the first top-surface wiring on the first surface and the first bottom-surface wiring on the second surface overlap with each other in the normal direction of the first surface. The first top-surface wiring and the first bottom-surface wiring are connected to each other through the above-mentioned one of the plate wirings.

Abstract translation: 布线基板包括基板，其中由金属板形成的板布线与由树脂或树脂组合物制成的绝缘部分以及与板布线电连接的表面布线一体地形成。 基座具有形成表面布线的第一和第二表面。 表面布线比板布线薄，并且表面布线之间的最小布线间隙小于板布线之间的最小布线间隙。 板状布线中的一个具有与第一表面上的第一顶表面布线和第二表面上的第一底表面布线在第一表面的法线方向上重叠的区域的形状基本相同的形状。 第一顶面布线和第一底面布线通过上述一个板布线彼此连接。