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    THIN FILM TRANSISTOR ARRAY PANEL
    31.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL 有权
    薄膜晶体管阵列

    公开(公告)号：US20140191238A1

    公开(公告)日：2014-07-10

    申请号：US14099977

    申请日：2013-12-08

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jung Hwan HWANG ,  Bon-Yong KOO ,  Soo Jin PARK ,  Jong-Moon PARK ,  Yong Hee LEE ,  Jong-Hyuk LEE ,  Duc-Han CHO

    IPC: H01L27/12 ,  H01L27/15

    CPC classification number: H01L29/41733 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/156 ,  H01L29/41775

    Abstract: A thin film transistor array panel includes a gate line elongated in an extension direction and including a gate and dummy gate electrode extended therefrom; and a source electrode, and a single drain member including a drain electrode at a first end thereof and a dummy drain electrode at an opposing second end thereof. The drain electrode faces the source electrode with respect to the gate electrode, and the dummy drain electrode overlaps the dummy gate electrode. The drain and dummy drain electrode respectively include a plurality of first and second regions each having a predetermined width in the extension direction. A second region includes an edge which forms an angle from about 0 degrees to about 90 degrees with the extension direction, and a planar area of at least one of the plurality of second regions is different from that of remaining second regions.

    Abstract translation: 薄膜晶体管阵列面板包括在延伸方向上延伸的栅极线，并且包括从其延伸的栅极和虚拟栅电极; 源电极和在其第一端包括漏极的单个漏极构件和在其相对的第二端处的虚设漏电极。 漏电极相对于栅电极面对源电极，虚设漏电极与虚拟栅电极重叠。 漏极和虚设漏电极分别包括在延伸方向上具有预定宽度的多个第一和第二区域。 第二区域包括与延伸方向形成约0度至约90度的角度的边缘，并且多个第二区域中的至少一个的平面区域与剩余的第二区域的平面区域不同。

    DISPLAY DEVICE AND TILED DISPLAY DEVICE
    33.
    发明公开
    DISPLAY DEVICE AND TILED DISPLAY DEVICE 审中-公开

    公开(公告)号：US20240212582A1

    公开(公告)日：2024-06-27

    申请号：US18473879

    申请日：2023-09-25

    Applicant: Samsung Display Co., LTD.

    Inventor： Jung Hwan HWANG ,  Min Chul SHIN ,  Sung Hwan KIM ,  Ji Youn SEO ,  Kye Uk LEE

    IPC: G09G3/32

    CPC classification number: G09G3/32 ,  G09G2300/026 ,  G09G2310/0275 ,  G09G2310/08 ,  G09G2320/0233

    Abstract: A display device includes first sub-pixels, each of the first sub-pixels including a first light emitting element of a first color, and at least one of the first sub-pixels includes a first circuit unit configured to control a supply period of a driving current in response to a first data signal supplied from a first data line, a second circuit unit configured to supply the driving current to the first light emitting element in response to a second data signal supplied from a second data line, and a sensing transistor connected between a first electrode of the first light emitting element and the second data line, and having a gate electrode connected to a sensing line.

    DISPLAY DEVICE
    34.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号：US20230238487A1

    公开(公告)日：2023-07-27

    申请号：US17955859

    申请日：2022-09-29

    Applicant: Samsung Display Co., LTD.

    Inventor： Jung Hwan HWANG ,  Hyun Joon KIM ,  Kye Uk LEE ,  Sang Jin JEON

    IPC: H01L33/38 ,  H01L33/62 ,  H01L27/15 ,  G09G3/32

    CPC classification number: H01L33/382 ,  H01L33/62 ,  H01L27/156 ,  G09G3/32

    Abstract: A display includes a first sub-pixel that emits a first color light and a second sub-pixel that emits a second color light. The first sub-pixel includes a first anode pad electrode, a second anode pad electrode, a first cathode pad electrode, and a first light emitting element including a first sub-light emitting element disposed on the first anode pad electrode and the first cathode pad electrode, and a second sub-light emitting element disposed on the second anode pad electrode and the first cathode pad electrode. An area of the first cathode pad electrode is larger than an area of the first anode pad electrode or an area of the second anode pad electrode. The first sub-light emitting element and the second sub-light emitting element emit the first color light during different periods, and the first sub-light emitting element and the second sub-light emitting element emit a same color light.

    DISPLAY DEVICE
    37.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号：US20230186836A1

    公开(公告)日：2023-06-15

    申请号：US18072507

    申请日：2022-11-30

    Applicant: Samsung Display Co., LTD.

    Inventor： Jun Ki JEONG ,  Hyun Joon KIM ,  Jung Hwan HWANG

    IPC: G09G3/32

    CPC classification number: G09G3/32 ,  G09G2300/0852 ,  G09G2320/0233

    Abstract: A display device including: a first transistor configured to control a control current based on a voltage of a first node; a second transistor configured to electrically connect a second node that is a first electrode of the first transistor to a first data line in response to a scan write signal; a third transistor configured to control a driving current based on a voltage of a third node; a fourth transistor configured to electrically connect a fourth node that is a first electrode of the third transistor to a second data line in response to the scan write signal; a fifth transistor configured to control the driving current based on a voltage of a fifth node having received the control current; and a light emitting element configured to receive the driving current, wherein the fifth transistor is of a different type from that of the first to fourth transistors.

    DISPLAY DEVICE
    38.
    发明申请
    DISPLAY DEVICE 有权

    公开(公告)号：US20230078842A1

    公开(公告)日：2023-03-16

    申请号：US17748881

    申请日：2022-05-19

    Applicant: Samsung Display Co., LTD.

    Inventor： Hyun Joon KIM ,  Jun Ki JEONG ,  Jung Hwan HWANG ,  Kye Uk LEE ,  Sang Jin JEON

    IPC: H01L27/32

    Abstract: A display device includes a first scan line to receive a first scan signal, a second scan line to receive a second scan signal, a sweep signal line to receive a sweep signal, a first data line to receive a first data voltage, a second data line to receive a second data voltage, and a sub-pixel connected to the first scan line, the second scan line, the sweep signal line, the first data line, and the second data line. The sub-pixel includes a light emitting element, a first pixel driver configured to generate a control current according to the first data voltage of the first data line, and a second pixel driver configured to generate a driving current applied to the light emitting element according to the second data voltage of the second data line.

    DISPLAY DEVICE AND DRIVING METHOD THEREOF
    39.
    发明申请
    DISPLAY DEVICE AND DRIVING METHOD THEREOF 有权

    公开(公告)号：US20220335881A1

    公开(公告)日：2022-10-20

    申请号：US17517734

    申请日：2021-11-03

    Applicant: Samsung Display Co., Ltd.

    Inventor： Hyuk KIM ,  Yang Hwa CHOI ,  Jung Hwan HWANG

    IPC: G09G3/32

    Abstract: A display device of the present inventive concept includes a processor supplying grayscale data in active periods of frame periods and stopping supply of the grayscale data in blank periods of the frame periods; a switch controller generating a first switch control signal when a blank period is longer than a predetermined period, and generating a second switch control signal when the blank period ends; a power supply supplying a voltage different from a first power voltage to a first power line when the first switch control signal is received and supplying the first power voltage to the first power line when the second switch control signal is received; and pixels commonly connected to the first power line.

    DISPLAY PANEL
    40.
    发明申请
    DISPLAY PANEL 有权

    公开(公告)号：US20210209997A1

    公开(公告)日：2021-07-08

    申请号：US17209068

    申请日：2021-03-22

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jung Hwan HWANG ,  Beom Jun KIM ,  Seong Yeol SYN ,  Bong-Jun LEE ,  You Mee HYUN

    IPC: G09G3/20 ,  G09G3/36 ,  G11C19/28

    Abstract: A display panel is provided. The display panel includes a display area comprising a gate line and a data line, and a gate driver connected to a terminal of the gate line. The gate driver includes a plurality of stages that are integrated on a substrate, and each stage comprises an inverter unit, an output unit, and a Q node stabilization unit. The output unit includes a first transistor and a first capacitor, wherein the first transistor includes an input terminal for receiving a clock signal, a control terminal connected to a node Q, and an output terminal connected to a gate voltage output terminal to output a gate voltage. A Vgs voltage of a transistor in the Q node stabilization unit has a value of equal to or less than 0 V when the output unit outputs a gate-on voltage.

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