公开(公告)号：US11631707B2

公开(公告)日：2023-04-18

申请号：US17116958

申请日：2020-12-09

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yoshihiro Sato ,  Junji Hirase

IPC: H01L27/146 ,  H04N5/359 ,  H01L27/30 ,  H04N5/369

Abstract: An imaging device including: a photoelectric converter that generates a signal charge by photoelectric conversion of light; a semiconductor substrate; a charge accumulation region that is an impurity region of a first conductivity type in the semiconductor substrate, the charge accumulation region being configured to receive the signal charge; a first transistor that includes, as a source or a drain, a first impurity region of the first conductivity type in the semiconductor substrate; and a blocking structure that is located between the charge accumulation region and the first transistor. The blocking structure includes a second impurity region of a second conductivity type in the semiconductor substrate, the second conductivity type being different from the first conductivity type, and a first electrode that is located above the semiconductor substrate, the first electrode being configured to be applied with a first voltage.

公开(公告)号：US11532653B2

公开(公告)日：2022-12-20

申请号：US17518058

申请日：2021-11-03

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Junji Hirase ,  Yoshinori Takami ,  Yoshihiro Sato

IPC: H01L27/146 ,  H04N5/369 ,  H01L27/30 ,  H04N5/359

Abstract: An imaging device, including a photoelectric converter that generates a signal charge by photoelectric conversion of light; and a semiconductor substrate. The semiconductor substrate includes: a charge accumulation region that is an impurity region of a first conductivity type, and configured to accumulate the signal charge; a first impurity region of the first conductivity type, the first impurity region being one of a source or a drain of a first transistor and adjacent to the charge accumulation region; and a blocking structure located between the charge accumulation region and the first impurity region. The blocking structure includes a second impurity region of a second conductivity type different from the first conductivity type, a part of the second impurity region located on a surface of the semiconductor substrate, and the second impurity region is not in contact with the first impurity region on the surface of the semiconductor substrate.

公开(公告)号：US11251216B2

公开(公告)日：2022-02-15

申请号：US16535963

申请日：2019-08-08

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Junji Hirase ,  Yoshinori Takami ,  Yoshihiro Sato

IPC: H01L27/146

Abstract: An imaging device includes: a semiconductor layer including a first region of a first conductivity, a second region of a second conductivity opposite to the first conductivity, and a third region of the second conductivity; a photoelectric converter electrically connected to the first region and converting light into charge; a first transistor including a first source, a first drain, and a first gate above the second region, the first region corresponding to the first source or drain; and a second transistor including a second source, a second drain, and a second gate of the second conductivity above the third region, the first region corresponding to the second source or drain, and the second gate being electrically connected to the first region. The concentration of an impurity of the second conductivity in the third region is higher than that of an impurity of the second conductivity in the second region.

公开(公告)号：US10892286B2

公开(公告)日：2021-01-12

申请号：US16411207

申请日：2019-05-14

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yoshihiro Sato ,  Junji Hirase

IPC: H01L27/146 ,  H04N5/359 ,  H01L27/30 ,  H04N5/369

Abstract: An imaging device according to the present disclosure includes: a photoelectric converter generating signal charge; a semiconductor substrate including a first semiconductor layer on a surface; a charge accumulation region of a first conductivity type in the first semiconductor layer; a first transistor including, as a source or a drain, a first impurity region of the first conductivity type in the first semiconductor layer; and a blocking structure between the charge accumulation region and the first transistor. The blocking structure includes a second impurity region of a second conductivity type in the first semiconductor layer, between the charge accumulation region and the first impurity region, and a first electrode above the first semiconductor layer, overlapping at least part of the second impurity region in plan view, the first electrode being configured to be applied with a constant voltage in a period when the charge accumulation region accumulates the signal charge.

公开(公告)号：US10367025B2

公开(公告)日：2019-07-30

申请号：US15850645

申请日：2017-12-21

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Yoshihiro Sato ,  Ryohei Miyagawa ,  Tokuhiko Tamaki ,  Junji Hirase ,  Yoshiyuki Ohmori ,  Yoshiyuki Matsunaga

IPC: H01L27/146 ,  H04N5/363 ,  H04N5/378 ,  H01L21/266 ,  H01L21/8234

Abstract: Each unit pixel includes a photoelectric converter, an n-type impurity region forming an accumulation diode together with the semiconductor region, the accumulation diode accumulating a signal charge generated by the photoelectric converter, an amplifier transistor including a gate electrode electrically connected to the impurity region, and an isolation region formed around the amplifier transistor and implanted with p-type impurities. The amplifier transistor includes an n-type source/drain region formed between the gate electrode and the isolation region, and a channel region formed under the gate electrode. A gap in the isolation region is, in a gate width direction, wider at a portion including the channel region than at a portion including the source/drain region.

公开(公告)号：US10212372B2

公开(公告)日：2019-02-19

申请号：US14955086

申请日：2015-12-01

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yoshihiro Sato ,  Junji Hirase

IPC: H04N3/14 ,  H04N5/363 ,  H04N5/378 ,  H04N5/361 ,  H04N5/374 ,  H01L27/146

Abstract: An imaging device of the present disclosure includes: a unit pixel cell comprising a photoelectric converter converting incident light into signal charge, a semiconductor substrate, a charge storage region located in the semiconductor substrate and storing the signal charge, and a signal detection circuit detecting the signal charge; a feedback circuit negatively feeding back output of the signal detection circuit and comprising a signal line; and at least one wiring layer located between the semiconductor substrate and the photoelectric converter. The at least one wiring layer includes a portion of the signal line, the portion overlapping the unit pixel cell in a plan view. In the plan view, the portion is located on an opposite side from the charge storage region across a center line of the unit pixel cell, the center line being in parallel with a direction in which the signal line extends.

公开(公告)号：US09711558B2

公开(公告)日：2017-07-18

申请号：US14846947

申请日：2015-09-07

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yoshihiro Sato ,  Yoshinori Takami ,  Kosaku Saeki ,  Junji Hirase

IPC: H01L27/00 ,  H01L31/062 ,  H01L27/146

CPC classification number: H01L27/14643 ,  H01L27/14603 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14638 ,  H01L27/14665

Abstract: An imaging device including a unit pixel cell comprising: a semiconductor substrate including a first conductivity type region of a first conductivity type, a first and second impurity regions of a second conductivity type provided in the first conductivity type region; a photoelectric converter located above the semiconductor substrate; and a first transistor including a gate electrode and at least a part of the second impurity region as a source or a drain. The first impurity region is at least partially located in a surface of the semiconductor substrate and electrically connected to the photoelectric converter. The second impurity region is electrically connected to the photoelectric converter via the first impurity region and has an impurity concentration lower than that of the first impurity region. The second impurity region at least partially overlaps the gate electrode in a plan view.

公开(公告)号：US09627431B2

公开(公告)日：2017-04-18

申请号：US14572046

申请日：2014-12-16

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Mitsuyoshi Mori ,  Ryohei Miyagawa ,  Yoshiyuki Ohmori ,  Yoshihiro Sato ,  Yutaka Hirose ,  Yusuke Sakata ,  Toru Okino

IPC: H01L27/146 ,  H01L27/30

CPC classification number: H01L27/14636 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/307

Abstract: A solid-state imaging device according to the present disclosure includes: a charge storage region that stores a signal charge obtained through photoelectric conversion in a photoelectric conversion film; an amplification transistor that amplifies the signal charge stored in the charge storage region in a corresponding pixel; a contact plug that is electrically connected to the charge storage region and contains a semiconductor material; and a line that is disposed above the contact plug and contains a semiconductor material. The contact plug and the charge storage region are electrically connected, and the contact plug and a gate electrode of the amplification transistor are electrically connected via the line.

公开(公告)号：US12160673B2

公开(公告)日：2024-12-03

申请号：US18296253

申请日：2023-04-05

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yoshihiro Sato ,  Junji Hirase

IPC: H04N25/65 ,  H01L27/146 ,  H04N25/63 ,  H04N25/75 ,  H04N25/76

Abstract: An imaging device including a semiconductor substrate; pixels; and a signal line located along the pixels, where each of the pixels includes: a photoelectric converter that generates signal charge by photoelectric conversion, a first transistor that outputs a signal to the signal line according to an amount of the signal charge, and a circuit that is coupled to a gate of the first transistor and that includes a capacitive element, and the signal line is located closer to the semiconductor substrate than the capacitive element.

公开(公告)号：US12081887B2

公开(公告)日：2024-09-03

申请号：US17472784

申请日：2021-09-13

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yoshihiro Sato

IPC: H04N25/75 ,  H04N25/701 ,  H04N25/702 ,  H01L27/146

CPC classification number: H04N25/75 ,  H04N25/701 ,  H04N25/702 ,  H01L27/14612

Abstract: An imaging device includes pixels. Each of the pixels includes a first photoelectric conversion layer, a first pixel electrode, a second photoelectric conversion layer, a second pixel electrode, a third photoelectric conversion layer, a third pixel electrode, a first counter electrode, and a second counter electrode. The first pixel electrode, the first photoelectric conversion layer, the first counter electrode, the second photoelectric conversion layer, the second pixel electrode, the second counter electrode, the third photoelectric conversion layer, and the third pixel electrode are arranged in this order.