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公开(公告)号：US12080732B2
公开(公告)日：2024-09-03
申请号：US18137916
申请日：2023-04-21
Inventor： Masashi Murakami , Kazuko Nishimura , Yutaka Abe , Yoshiyuki Matsunaga , Yoshihiro Sato , Junji Hirase
IPC: H01L27/146 , H10K30/00
CPC classification number: H01L27/14609 , H01L27/14632 , H01L27/14643 , H01L27/14665 , H01L27/14636 , H10K30/00
Abstract: An imaging device including a semiconductor substrate; a photoelectric converter that converts incident light into a signal charge, the photoelectric converter being stacked on the semiconductor substrate; a node to which the signal charge is input; a transistor having a source and a drain, one of the source and the drain being connected to the node; and a capacitive element connected between the transistor and a voltage source or a ground. The transistor is configured to switch between a first mode and a second mode, a sensitivity in the first mode being different from a sensitivity in the second mode, and in a cross-sectional view, the capacitive element is located between the semiconductor substrate and the photoelectric converter.
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公开(公告)号：US11329079B2
公开(公告)日：2022-05-10
申请号：US16945636
申请日：2020-07-31
Inventor： Masashi Murakami , Kazuko Nishimura , Yutaka Abe , Yoshiyuki Matsunaga , Yoshihiro Sato , Junji Hirase
IPC: H01L27/146 , H01L51/42
Abstract: An imaging device including a semiconductor substrate; a photoelectric converter stacked on the semiconductor substrate, the photoelectric converter being configured to generate a signal through photoelectric conversion of incident light; a multilayer wiring structure located between the semiconductor substrate and the photoelectric converter; and circuitry located in the multilayer wiring structure and the semiconductor substrate, the circuitry being configured to detect the signal. The circuitry includes a first capacitance element and a second capacitance element; and a first transistor including a first source and a first drain in the semiconductor substrate and a first gate. The first capacitance element includes a first electrode, a second electrode, and a dielectric film between the first electrode and the second electrode, the multilayer wiring structure includes an insulating layer adjacent to the first capacitance element, and a permittivity of the dielectric film is greater than a permittivity of the insulating layer.
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公开(公告)号：US11183524B2
公开(公告)日：2021-11-23
申请号：US16846851
申请日：2020-04-13
Inventor： Yoshihiro Sato
IPC: H01L27/146 , H04N5/363 , H04N5/3745
Abstract: An imaging device including a semiconductor substrate; pixels arranged on the semiconductor substrate in a first direction; and a signal line extending in the first direction. Each of the pixels includes a photoelectric converter generating signal charge by photoelectric conversion, a charge accumulation region that accumulates the signal charge output from the photoelectric converter, a first transistor that outputs a signal to the signal line according to an amount of the signal charge accumulated in the charge accumulation region, a capacity circuit that is coupled to a gate of the first transistor and that includes a first capacitive element, the first capacitive element including a first electrode, a second electrode and an insulating layer between the first electrode and the second electrode, at least one of the first electrode and the second electrode containing a metal. The first capacitive element is closer to the semiconductor substrate than the signal line.
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公开(公告)号：US10985197B2
公开(公告)日：2021-04-20
申请号：US16586805
申请日：2019-09-27
Inventor： Yoshihiro Sato , Yoshinori Takami , Ryota Sakaida
IPC: H01L27/146
Abstract: An imaging device includes: a semiconductor substrate including a first diffusion region of a first conductivity type and a second diffusion region of the first conductivity type; a first plug that is connected to the first diffusion region and that contains a semiconductor; a second plug that is connected to the second diffusion region and that contains a semiconductor; and a photoelectric converter that is electrically connected to the first plug. An area of the second plug is larger than an area of the first plug in a plan view.
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公开(公告)号：US10341591B2
公开(公告)日：2019-07-02
申请号：US15446545
申请日：2017-03-01
Inventor： Junji Hirase , Yoshihiro Sato , Yoshinori Takami , Masayuki Takase , Masashi Murakami
IPC: H04N5/359 , H04N5/361 , H04N5/363 , H04N5/369 , H01L27/146 , H04N5/3745
Abstract: An imaging device includes a semiconductor layer and a pixel cell. The pixel cell includes an impurity region of a first conductivity type, the impurity region located in the semiconductor layer, a photoelectric converter electrically connected to the impurity region and located above the semiconductor layer, a first transistor having a first gate, a first source and a first drain, one of the first source and the first drain electrically connected to the impurity region, a second transistor having a second gate of a second conductivity type different from the first conductivity type, a second source and a second drain, the second transistor including the impurity region as one of the second source and the second drain, the second gate electrically connected to the impurity region, and a third transistor having a third gate, a third source and a third drain, the third gate electrically connected to the photoelectric converter.
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Patent Agency Ranking
公开(公告)号：US10304828B2
公开(公告)日：2019-05-28
申请号：US15698019
申请日：2017-09-07
Inventor： Yoshihiro Sato , Ryota Sakaida , Satoshi Shibata , Taiji Noda
IPC: H01L27/092 , H01L27/146
Abstract: An imaging device includes: a semiconductor substrate; a first insulating layer covering a surface of the semiconductor substrate, the first insulating layer including first and second portions, a thickness of the first portion being greater than a thickness of the second portion; and an imaging cell. The imaging cell includes: a first transistor including a first gate insulating layer and an impurity region in the semiconductor substrate as one of a source and a drain; a second transistor including a gate electrode and a second gate insulating layer; and a photoelectric converter electrically connected to the gate electrode and the impurity region. The first portion covers a portion of the impurity region, the portion being exposed to the surface of the semiconductor substrate. The first gate insulating layer is a part of the first portion. The second gate insulating layer is a part of the second portion.
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公开(公告)号：US12302652B2
公开(公告)日：2025-05-13
申请号：US17483655
申请日：2021-09-23
Inventor： Takayoshi Yamada , Yoshihiro Sato , Taiji Noda
Abstract: An imaging device includes a semiconductor substrate and pixels, which includes a first pixel and second pixels adjacent thereto. Each of the pixels includes a first photoelectric conversion layer, a first pixel electrode, a first plug that electrically connects the semiconductor substrate and the first pixel electrode, a second photoelectric conversion layer, a second pixel electrode, and a second plug that electrically connects the semiconductor substrate and the second pixel electrode. In the first pixel and the plurality of second pixels, a distance between the closest plugs of the first plugs and the second plugs is larger than or equal to one-half of a pixel pitch, when viewed in a normal direction of the semiconductor substrate.
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公开(公告)号：US11336842B2
公开(公告)日：2022-05-17
申请号：US17185845
申请日：2021-02-25
Inventor： Masashi Murakami , Yasunori Inoue , Yoshihiro Sato , Kazuko Nishimura
IPC: H04N5/343 , H04N5/374 , H01L27/146
Abstract: An imaging device includes a first pixel. The first pixel has a photoelectric converting portion, a first capacitance element, and a first transistor. The photoelectric converting portion converts incident light into signal charge. The first capacitance element includes a first terminal and a second terminal, the first terminal being electrically connected to the photoelectric converting portion in at least a period of exposure. The first transistor includes a first source and a first drain, one of the first source and the first drain is electrically connected to the second terminal, and a direct-current potential is applied to the other of the first source and the first drain.
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公开(公告)号：US11223786B2
公开(公告)日：2022-01-11
申请号：US16243921
申请日：2019-01-09
Inventor： Yoshihiro Sato , Junji Hirase
IPC: H04N5/363 , H04N5/378 , H04N5/361 , H04N5/374 , H01L27/146
Abstract: An imaging device includes first and second pixels, arranged in a first direction, each of which includes: a photoelectric converter converting incident light into signal charge; an impurity region, in a semiconductor substrate, coupled to the photoelectric converter; a first transistor having a first gate coupled to the impurity region, and first source and drain; and a second transistor having second gate, source and drain. One of the second source and the second drain is the impurity region, and another is coupled to the first source or the first drain. The imaging device further includes a signal line, coupled to the first source or the first drain, and extends along the first direction and overlaps with both of the first and second pixels. The signal line is located on an opposite side from the impurity region across a center line of the first pixel.
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公开(公告)号：US11195865B2
公开(公告)日：2021-12-07
申请号：US16800967
申请日：2020-02-25
Inventor： Junji Hirase , Yoshinori Takami , Yoshihiro Sato
IPC: H01L27/146 , H04N5/369 , H01L27/30 , H04N5/359
Abstract: An imaging device including: a photoelectric converter that generates a signal charge by photoelectric conversion of light; a semiconductor substrate that includes a first semiconductor layer containing an impurity of a first conductivity type and an impurity of a second conductivity type different from the first conductivity type; and a first transistor that includes, as a source or a drain, a first impurity region of the second conductivity type in the first semiconductor layer. The first semiconductor layer includes: a charge accumulation region that is an impurity region of the second conductivity type, the charge accumulation region being configured to accumulate the signal charge; and a blocking structure that is located between the charge accumulation region and the first transistor, and the blocking structure includes a second impurity region of the second conductivity type.
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