公开(公告)号：US20160037111A1

公开(公告)日：2016-02-04

申请号：US14448154

申请日：2014-07-31

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Tiejun Dai ,  Rui Wang ,  Dyson H. Tai ,  Sohei Manabe

IPC: H04N5/378 ,  H01L27/146 ,  H04N5/376

CPC classification number: H04N5/378 ,  H01L27/14612 ,  H01L27/14634 ,  H01L27/14636 ,  H04N5/376

Abstract: A pixel cell includes a photodiode disposed within a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode. A transfer transistor is disposed within the first semiconductor chip and coupled to the photodiode to transfer the image charge from the photodiode. A bias voltage generation circuit disposed within a second semiconductor chip for generating a bias voltage. The bias voltage generation circuit is coupled to the first semiconductor chip to bias the photodiode with the bias voltage. The bias voltage is negative with respect to a ground voltage of the second semiconductor chip. A floating diffusion is disposed within the second semiconductor chip. The transfer transistor is coupled to transfer the image charge from the photodiode on the first semiconductor chip to the floating diffusion on the second semiconductor chip.

Abstract translation: 像素单元包括设置在第一半导体芯片内的光电二极管，用于响应入射在光电二极管上的光累积图像电荷。 传输晶体管设置在第一半导体芯片内并耦合到光电二极管以从光电二极管传输图像电荷。 偏置电压产生电路，设置在第二半导体芯片内，用于产生偏置电压。 偏置电压产生电路耦合到第一半导体芯片以偏置偏压的光电二极管。 偏置电压相对于第二半导体芯片的接地电压为负。 浮置扩散部设置在第二半导体芯片内。 传输晶体管被耦合以将图像电荷从第一半导体芯片上的光电二极管转移到第二半导体芯片上的浮动扩散。

公开(公告)号：US12247873B1

公开(公告)日：2025-03-11

申请号：US18438791

申请日：2024-02-12

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Rui Wang ,  Tiejun Dai ,  Lindsay Alexander Grant ,  Keiji Mabuchi

IPC: G01J1/44

Abstract: A method of counting photons using a plurality of single photon avalanche diodes (SPADs), including initiating a detection phase, enabling each single photon avalanche diode (SPAD) of the plurality of SPADs for a period of time within the detection phase, accumulating a SPAD event from each SPAD of the plurality of SPADs, wherein each SPAD event corresponds to a detection of a single photon, determining a counter code at an end of the detection phase, where the counter code corresponds to accumulated SPAD events, and enabling one or more SPADs of the plurality of SPADs within an exposure phase based on the counter code, where the counter code is greater than an expected number of the SPAD events during the exposure phase, and where the expected number of SPAD events during the exposure phase is based on the counter code that is determined at the end of the detection phase.

公开(公告)号：US20250047995A1

公开(公告)日：2025-02-06

申请号：US18363473

申请日：2023-08-01

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Liang Zuo ,  Hiroaki Ebihara ,  Jing Jun Yi ,  Rui Wang ,  Satoshi Sakurai

IPC: H04N25/677 ,  H04N25/766 ,  H04N25/772

Abstract: An imaging system comprises a pixel array and readout circuitry coupled to the pixel array. The readout circuitry includes a ramp generator and a plurality of column unit cells, each comprising a column ramp buffer and a column comparator, and each column ramp buffer comprising an input node coupled to receive a ramp signal from the ramp generator, a transistor having a gate terminal coupled to the input node and a drain terminal coupled to a power line, an output node coupled between a source terminal of the transistor and the column comparator, and an alternating current (AC) coupling unit coupled between the input node and the transistor. The AC coupling unit comprises a capacitor coupled between the input node and the gate terminal of the transistor, and a reset switch coupled between the input node and the gate terminal of the transistor.

公开(公告)号：US20240276124A1

公开(公告)日：2024-08-15

申请号：US18167665

申请日：2023-02-10

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Shan Chen ,  Hiroaki Ebihara ,  Rui Wang ,  Zhenfu Tian

IPC: H04N25/78 ,  H04N25/77

CPC classification number: H04N25/78 ,  H04N25/77

Abstract: A local ramp buffer includes a deep N− well layer disposed in a P− substrate beneath a surface of the P− substrate, a P− well disposed between the surface of the P− substrate and the deep N− well layer, and an N− well structure disposed in the P− substrate and coupled to the deep N− well layer. The N− well structure is disposed between the surface of the P− substrate and the deep N− well layer. The P− well is disposed inside an opening in the N− well structure. The N− well structure and the deep N− well layer are configured to isolate the P− well within the opening. A source follower transistor is disposed in the P− well. The source follower transistor includes a gate terminal coupled to the N− well structure and a ramp generator.

公开(公告)号：US11716546B2

公开(公告)日：2023-08-01

申请号：US17649890

申请日：2022-02-03

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Qingfei Chen ,  Rui Wang ,  Wei Wei Wang ,  Zhiyong Zhan ,  Xin Wang ,  Qingwei Shan ,  Kenny Geng

IPC: H04N5/374 ,  H04N25/11 ,  H04N25/75 ,  H04N25/77 ,  H04N25/704 ,  H01L27/146

CPC classification number: H04N25/11 ,  H04N25/704 ,  H04N25/75 ,  H04N25/77 ,  H01L27/14621 ,  H01L27/14645

Abstract: An imaging device includes groupings of photodiodes having four photodiodes. A transfer transistor is between each photodiode and a floating diffusion. Each floating diffusion is coupled to up to two photodiodes per grouping at a time through transfer transistors. A buffer transistor is coupled to each floating diffusion. The buffer transistors may be in a first or second grouping of buffer transistors. A first bit line is coupled to up to two buffer transistors of the first grouping and a second bit line is coupled to up to two buffer transistors of the second grouping of buffer transistors at a time. A color filter array including a plurality of groupings of color filters is disposed over respective photodiodes of the photodiode array, wherein each grouping of color filters includes four color filters having a same color, wherein each grouping of color filters overlaps two groupings of photodiodes.

公开(公告)号：US11375150B1

公开(公告)日：2022-06-28

申请号：US17342378

申请日：2021-06-08

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Rui Wang

IPC: H04N5/369 ,  H04N5/378 ,  H04N5/374

Abstract: An imaging device includes a photodiode array including a 2×2 grouping of N×N groupings of photodiodes. Each N×N grouping includes N2−1 image sensing photodiodes and a single phase detection autofocus (PDAF) photodiode that is arranged proximate to a center of the 2×2 grouping. A shared floating diffusion is coupled to each photodiode of a respective N×N grouping of photodiodes. An analog to digital converter (ADC) is configured to generate a reference readout in response to charge in the shared floating diffusion after a reset operation. The ADC is next configured to generate a PDAF readout in response to charge transferred from the single PDAF photodiode to the shared floating diffusion. The ADC is then configured to generate a combined readout in response to charge transferred from the image sensing photodiodes combined with the charge transferred previously from the single PDAF photodiode in the shared floating diffusion.

公开(公告)号：US20220159222A1

公开(公告)日：2022-05-19

申请号：US17649890

申请日：2022-02-03

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Qingfei Chen ,  Rui Wang ,  Wei Wei Wang ,  Zhiyong Zhan ,  Xin Wang ,  Qingwei Shan ,  Kenny Geng

IPC: H04N9/04 ,  H04N5/369 ,  H04N5/378 ,  H04N5/3745

Abstract: An imaging device includes groupings of photodiodes having four photodiodes. A transfer transistor is between each photodiode and a floating diffusion. Each floating diffusion is coupled to up to two photodiodes per grouping at a time through transfer transistors. A buffer transistor is coupled to each floating diffusion. The buffer transistors may be in a first or second grouping of buffer transistors. A first bit line is coupled to up to two buffer transistors of the first grouping and a second bit line is coupled to up to two buffer transistors of the second grouping of buffer transistors at a time. A color filter array including a plurality of groupings of color filters is disposed over respective photodiodes of the photodiode array, wherein each grouping of color filters includes four color filters having a same color, wherein each grouping of color filters overlaps two groupings of photodiodes.

公开(公告)号：US20220078365A1

公开(公告)日：2022-03-10

申请号：US17531465

申请日：2021-11-19

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Chengcheng Xu ,  Rui Wang ,  Bi Yuan ,  Liang Zuo

IPC: H04N5/378 ,  H04N5/3745 ,  H04N5/374 ,  H04N5/376 ,  H04N5/369

Abstract: An image sensing device includes an image sensing circuit, a voltage supply grid, bitlines, and a control circuit. The image sensing circuit includes pixels arranged in rows and columns. Each one of the bitlines is coupled to a corresponding one of the columns. The voltage supply grid is coupled to the pixels. The control circuit is coupled to output at least a row select signal and a transfer signal to the rows. Each one of the rows is selectively coupled to the bitlines to selectively output image data signals in response to the row select signal and the transfer signal. Each one of the rows is further selectively coupled to the bitlines to selectively clamp the bitlines in response to the row select signal and the transfer signal. Each one of the rows is selectively decoupled from the bitlines in response to the row select signal.

公开(公告)号：US20210358994A1

公开(公告)日：2021-11-18

申请号：US17066277

申请日：2020-10-08

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Sang Joo Lee ,  Rui Wang ,  Hiroaki Ebihara ,  Tiejun Dai ,  Hiroki Ui

IPC: H01L27/146 ,  H01L27/148 ,  H04N5/378

Abstract: A pixel array includes pixel cells disposed in semiconductor material. Each of the pixel cells includes photodiodes, and a floating diffusion to receive image charge from the photodiodes. A source follower is coupled to the floating diffusion to generate an image signal in response image charge from the photodiodes. Drain regions of first and second row select transistors are coupled to a source of the source follower. A common junction is disposed in the semiconductor material between gates of the first and second row select transistors such that the drains of the first and second row select transistors are shared and coupled together through the semiconductor material of the common junction. The pixel cells are organized into a rows and columns with bitlines.

公开(公告)号：US20210176417A1

公开(公告)日：2021-06-10

申请号：US16708135

申请日：2019-12-09

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Chengcheng Xu ,  Rui Wang ,  Bi Yuan ,  Liang Zuo

IPC: H04N5/378 ,  H04N5/3745

Abstract: An image sensing device includes an image sensing circuit, a voltage supply grid, bitlines, and a control circuit. The image sensing circuit includes pixels arranged in rows and columns. Each one of the bitlines is coupled to a corresponding one of the columns. The voltage supply grid is coupled to the pixels. The control circuit is coupled to output at least a row select signal and a transfer signal to the rows. Each one of the rows is selectively coupled to the bitlines to selectively output image data signals in response to the row select signal and the transfer signal. Each one of the rows is further selectively coupled to the bitlines to selectively clamp the bitlines in response to the row select signal and the transfer signal. Each one of the rows is selectively decoupled from the bitlines in response to the row select signal.