Dynamic array masking
    35.
    发明授权
    Dynamic array masking 有权
    动态数组屏蔽

    公开(公告)号:US09489255B2

    公开(公告)日:2016-11-08

    申请号:US14620698

    申请日:2015-02-12

    Abstract: A method, system, and/or computer program product for dynamic array masking is provided. Dynamic array masking includes, during execution of computer instructions that access a cache memory, detecting an error condition in a portion of the cache memory. The portion of the cache memory contains an array macro. Dynamic array masking, during the execution of the computer instructions that access a cache memory, further includes dynamically setting mask bits to indicate the error condition in the portion of the cache memory and preventing subsequent writes to the portion of the cache memory in accordance with the dynamically set mask bits. Embodiments also include evicting cache entries from the portion of the cache memory. This evicting can include performing a cache purge operation for the cache entries corresponding to the dynamically set mask bits.

    Abstract translation: 提供了一种用于动态阵列屏蔽的方法,系统和/或计算机程序产品。 在执行访问高速缓冲存储器的计算机指令期间,动态阵列掩蔽包括在高速缓冲存储器的一部分中检测错误状况。 高速缓存的一部分包含一个数组宏。 在执行访问高速缓冲存储器的计算机指令期间的动态阵列屏蔽进一步包括动态地设置屏蔽位以指示高速缓冲存储器的该部分中的错误状况,并且根据该缓存存储器的部分防止后续写入 动态设置掩码位。 实施例还包括从缓存存储器的部分驱逐高速缓存条目。 这种逐出可以包括对与动态设置的掩码位对应的高速缓存条目执行高速缓存清除操作。

    DYNAMIC ARRAY MASKING
    37.
    发明申请
    DYNAMIC ARRAY MASKING 有权
    动态阵列屏蔽

    公开(公告)号:US20160239378A1

    公开(公告)日:2016-08-18

    申请号:US14620698

    申请日:2015-02-12

    Abstract: A method, system, and/or computer program product for dynamic array masking is provided. Dynamic array masking includes, during execution of computer instructions that access a cache memory, detecting an error condition in a portion of the cache memory. The portion of the cache memory contains an array macro. Dynamic array masking, during the execution of the computer instructions that access a cache memory, further includes dynamically setting mask bits to indicate the error condition in the portion of the cache memory and preventing subsequent writes to the portion of the cache memory in accordance with the dynamically set mask bits. Embodiments also include evicting cache entries from the portion of the cache memory. This evicting can include performing a cache purge operation for the cache entries corresponding to the dynamically set mask bits.

    Abstract translation: 提供了一种用于动态阵列屏蔽的方法,系统和/或计算机程序产品。 在执行访问高速缓冲存储器的计算机指令期间,动态阵列掩蔽包括在高速缓冲存储器的一部分中检测错误状况。 高速缓存的一部分包含一个数组宏。 在执行访问高速缓冲存储器的计算机指令期间的动态阵列屏蔽进一步包括动态地设置屏蔽位以指示高速缓冲存储器的该部分中的错误状况,并且根据该缓存存储器的部分防止后续写入 动态设置掩码位。 实施例还包括从缓存存储器的部分驱逐高速缓存条目。 这种逐出可以包括对与动态设置的掩码位对应的高速缓存条目执行高速缓存清除操作。

    Storing data in a system memory for a subsequent cache flush
    38.
    发明授权
    Storing data in a system memory for a subsequent cache flush 有权
    将数据存储在系统内存中以进行后续高速缓存清理

    公开(公告)号:US09003127B2

    公开(公告)日:2015-04-07

    申请号:US14086308

    申请日:2013-11-21

    Abstract: Embodiments relate to storing data to a system memory. An aspect includes accessing successive entries of a cache directory having a plurality of directory entries by a stepper engine, where access to the cache directory is given a lower priority than other cache operations. It is determined that a specific directory entry in the cache directory has a change line state that indicates it is modified. A store operation is performed to send a copy of the specific corresponding cache entry to the system memory as part of a cache management function. The specific directory entry is updated to indicate that the change line state is unmodified.

    Abstract translation: 实施例涉及将数据存储到系统存储器。 一个方面包括通过步进引擎访问具有多个目录条目的高速缓存目录的连续条目,其中对高速缓存目录的访问被给予比其他高速缓存操作更低的优先级。 确定高速缓存目录中的特定目录条目具有指示其被修改的改变行状态。 执行存储操作以将特定对应的高速缓存条目的副本作为高速缓存管理功能的一部分发送到系统存储器。 特定目录条目被更新以指示改变线状态是未修改的。

    Multilevel cache hierarchy for finding a cache line on a remote node
    39.
    发明授权
    Multilevel cache hierarchy for finding a cache line on a remote node 有权
    用于在远程节点上查找缓存行的多级缓存层次结构

    公开(公告)号:US08972664B2

    公开(公告)日:2015-03-03

    申请号:US13793708

    申请日:2013-03-11

    CPC classification number: G06F12/0811 G06F12/0817 G06F12/0884 G06F12/123

    Abstract: Embodiments relate to accessing a cache line on a multi-level cache system having a system memory. Based on a request for exclusive ownership of a specific cache line at the local node, requests are concurrently sent to the system memory and remote nodes of the plurality of nodes for the specific cache line by the local node. The specific cache line is found in a specific remote node. The specific remote node is one of the remote nodes. The specific cache line is removed from the specific remote node for exclusive ownership by another node. Based on the specified node having the specified cache line in ghost state, any subsequent fetch request is initiated for the specific cache line from the specific node encounters the ghost state. When the ghost state is encountered, the subsequent fetch request is directed only to nodes of the plurality of nodes.

    Abstract translation: 实施例涉及在具有系统存储器的多级缓存系统上访问高速缓存行。 基于本地节点对特定高速缓存线的独占所有权的请求,请求被本地节点同时发送到用于特定高速缓存行的多个节点的系统内存和远程节点。 在特定的远程节点中找到特定的高速缓存行。 特定的远程节点是远程节点之一。 从特定的远程节点中删除特定的高速缓存行以供另一个节点独占所有。 基于具有指定缓存行在幽灵状态的指定节点,任何后续的提取请求将针对具体的缓存行启动,特定的缓存行遇到幽灵状态。 当遇到鬼状态时,后续的提取请求仅被引导到多个节点的节点。

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