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公开(公告)号：US20190111696A1
公开(公告)日：2019-04-18
申请号：US16094113
申请日：2016-04-29
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Daryl E. Anderson , Michael W. Cumbie , James Michael Gardner , Berkeley Fisher
IPC: B41J2/175
Abstract: An example printing cartridge includes a sensing die including a plurality of sensing locations in thermal contact with a fluid container, an on-die controller to select a sensing location of the plurality of sensing locations to activate and to provide a variable threshold voltage, and a voltage comparator to compare a sensed voltage generated at a selected sensing location to the variable threshold voltage, and output time-based information based on the comparison, the time-based information representative of whether a fluid is present at a fluid level associated with the selected sensing location.
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公开(公告)号：US10099473B2
公开(公告)日：2018-10-16
申请号：US15114938
申请日：2014-01-30
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Daryl E. Anderson , Eric T. Martin , Peter James Fricke , James Michael Gardner
Abstract: Systems and methods for evaluating the condition of a print nozzle are described. In one example, impedances across the print nozzle are measured. Subsequently, first test result and second test result are determined and registered at a first predetermined time instant and at a second predetermined time instant, respectively. The first test result and the second test result are obtained based on the measured impedances. Based on the first test result and the second test result, the condition of the print nozzle, is determined.
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公开(公告)号：US20180207931A1
公开(公告)日：2018-07-26
申请号：US15937109
申请日：2018-03-27
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Daryl E. Anderson , Eric T. Martin , Peter James Fricke , James Michael Gardner
IPC: B41J2/045
CPC classification number: B41J2/04541 , B41J2/04586 , B41J2/04588 , B41J2/0459 , B41J2/04591
Abstract: An example device in accordance with an aspect of the present disclosure includes modules to generate an input signal, apply the input signal to an ink sample to obtain an ink signal, compare the ink signal to a reference value, and identify whether the ink signal is consistent with an ink signature. A module may be contained on an inkjet printhead die.
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公开(公告)号：US10005276B2
公开(公告)日：2018-06-26
申请号：US15307869
申请日：2014-06-30
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Daryl E Anderson , Eric T Martin , Peter James Fricke , James Michael Gardner
IPC: B41J2/045
CPC classification number: B41J2/04541 , B41J2/04586 , B41J2/04588 , B41J2/0459 , B41J2/04591
Abstract: An example device in accordance with an aspect of the present disclosure includes modules to generate an input signal, apply the input signal to an ink sample to obtain an ink signal, compare the ink signal to a reference value, and identify whether the ink signal is consistent with an ink signature. A module may be contained on an inkjet printhead die.
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公开(公告)号：US20160125943A1
公开(公告)日：2016-05-05
申请号：US14527466
申请日：2014-10-29
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： James Michael Gardner , Eric T. Martin , Daryl E. Anderson
CPC classification number: G11C16/10 , B41J2/17546 , G03G21/1882 , G11C16/0408 , G11C16/08 , G11C16/12 , G11C16/30
Abstract: Methods to program a floating gate memory array include, in response to a request to program a second bit of the floating gate memory array, at a first time, outputting a programming voltage to cause a first node voltage at a first source of a first transistor corresponding to a first bit, wherein the first node voltage is greater than a second node voltage at a second source of a second transistor corresponding to the second bit. The method further includes at a second time, increasing the programming voltage of the floating gate memory array to program the second bit of the floating gate memory array.
Abstract translation: 编程浮动栅极存储器阵列的方法包括响应于对浮置栅极存储器阵列的第二位进行编程的请求，在第一时间输出编程电压以使第一晶体管的第一源处的第一节点电压 对应于第一位，其中第一节点电压大于对应于第二位的第二晶体管的第二源处的第二节点电压。 该方法还包括第二时间，增加浮动栅极存储器阵列的编程电压以对浮动栅极存储器阵列的第二位进行编程。
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Patent Agency Ranking
公开(公告)号：US12183430B2
公开(公告)日：2024-12-31
申请号：US18135697
申请日：2023-04-17
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Scott A. Linn , James Michael Gardner , Michael W. Cumbie
Abstract: An integrated circuit to drive a number of fluid actuation devices, comprising a circuit configured to have a memory access state which can be set to one of an enabled state and disabled state. The integrated circuit to include a fluid actuation circuit to transmit selection information for a fluid actuation device, the selection information comprising a data state bit. The integrated circuit to include a memory cell array, configured so that each memory cell is accessible by the memory access state being enabled, and the data state bit being set.
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公开(公告)号：US12145360B2
公开(公告)日：2024-11-19
申请号：US18393224
申请日：2023-12-21
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Scott A. Linn , James Michael Gardner , Michael W. Cumbie
IPC: B41J2/045
Abstract: An integrated circuit includes a plurality of memory cells, an address decoder to select memory cells based on a data signal, activation logic to activate selected memory cells based on the data signal and a fire signal, and configuration logic to enable or disable access to the plurality of memory cells.
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公开(公告)号：US12030312B2
公开(公告)日：2024-07-09
申请号：US18448794
申请日：2023-08-11
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Boon Bing Ng , James Michael Gardner , Scott A. Linn
CPC classification number: B41J2/04536 , B41J2/04541 , B41J2/04555 , B41J2/04563 , B41J2/0458 , B41J2/04586 , G06F3/1293 , G06F13/1668 , G11C7/1069 , G11C16/10 , G11C16/26 , G11C2207/105
Abstract: A memory circuit for a print component including a plurality of I/O pads, including an analog pad, to connect to a plurality of signal paths which communicate operating signals to the print component. The memory circuit includes a controllable selector connected in line with one of the signal paths via the I/O pads, the selector controllable to disconnect the corresponding signal path to the print component, and a memory component to store memory values associated with the print component. A control circuit, in response to a sequence of operating signals received by the I/O pads representing a memory read, to operate the controllable selector to disconnect the signal path to the print component to block the memory read of the print component, and provide an analog signal to the analog pad to provide an analog electrical value at the analog pad representing stored memory values selected by the memory read.
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39.发明授权公开(公告)号：US11932014B2
公开(公告)日：2024-03-19
申请号：US18139106
申请日：2023-04-25
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Scott A. Linn , James Michael Gardner , John Rossi
CPC classification number: B41J2/0458 , B41J2/04585 , B41J2002/14475
Abstract: A print component includes an array of fluidic actuation structures including a first column of fluidic actuating structures addressable by a set of actuation addresses, each fluidic actuating structure having a different one of the actuation addresses and having a fluidic architecture type, and a second column of fluidic actuating structures addressable by the set of actuation addresses. Each fluidic actuating structure of the second column has a different one of the actuation addresses and has a same fluidic architecture type as the fluidic actuating structure of the first column having the same address. An address bus communicates the set of addresses to the array of fluidic actuating structures, and a fire signal line communicates a plurality of fire pulse signal types to the array of fluidic actuating structures, the fire pulse signal type depending on the actuation address on the address bus.
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公开(公告)号：US11858265B2
公开(公告)日：2024-01-02
申请号：US17985590
申请日：2022-11-11
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Scott A. Linn , James Michael Gardner , Erik D. Ness
IPC: B41J29/393 , B41J2/045
CPC classification number: B41J2/04541 , B41J2/04543 , B41J2/04586
Abstract: An integrated circuit to drive a plurality of fluid actuation devices includes a plurality of first non-volatile memory cells and control logic. Each first non-volatile memory cell stores a customization bit. The control logic configures an operation of the integrated circuit based on the customization bits.
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