公开(公告)号：US06639468B2

公开(公告)日：2003-10-28

申请号：US09886852

申请日：2001-06-21

申请人： Didier Belot

发明人： Didier Belot

IPC分类号： H03F345

CPC分类号： H03F3/191 ,  H03F3/45089 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2203/45316 ,  H03F2203/45386 ,  H03F2203/45554 ,  H03F2203/45704

摘要： The amplifier includes an input amplifier stage, an output amplifier stage cascode-connected with the input amplifier stage, and a load stage connected to the output stage. The load stage includes a plurality of circuits each including a capacitive component and an inductive component having a Q greater than 10, and having respective different resonant frequencies. All the gain curves respectively associated with all the circuits have, to within a stated tolerance, the same maximum gain value at the resonant frequencies. The gain curves respectively associated with two circuits having respective immediately adjacent resonant frequencies overlap below a threshold 3 dB, to within a stated tolerance, below the maximum gain value.

公开(公告)号：US06366166B1

公开(公告)日：2002-04-02

申请号：US09654505

申请日：2000-08-30

申请人： Didier Belot

发明人： Didier Belot

IPC分类号： H03F122

CPC分类号： H03F3/45089 ,  H03F3/191 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2203/45386 ,  H03F2203/45554 ,  H03F2203/45704

摘要： An amplifier circuit including at least one first input amplifier; at least one second amplifier cascode-assembled with the first amplifier; and at least one reactive impedance circuit, mounted in series with the second amplifier, the reactive impedance circuit being formed by two impedances respectively exhibiting a maximum value for a first and a second frequency, to form a double-band amplifier circuit.

摘要翻译： 一种放大器电路，包括至少一个第一输入放大器; 与所述第一放大器组装的至少一个第二放大器共源共栅; 以及与第二放大器串联安装的至少一个无功阻抗电路，所述无功阻抗电路由分别呈现第一和第二频率的最大值的两个阻抗形成，以形成双频带放大器电路。

公开(公告)号：US06285071B1

公开(公告)日：2001-09-04

申请号：US09466728

申请日：1999-12-17

申请人： Didier Belot

发明人： Didier Belot

IPC分类号： H01L2900

CPC分类号： H01L24/49 ,  H01L23/66 ,  H01L24/48 ,  H01L2224/05553 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01051 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099

摘要： A semiconductor device of the type having an integrated circuit with connection terminals connected to metal pads by connecting wires is provided. The integrated circuit includes a substrate-on-insulator type semiconductor substrate having a lower portion on top of which there is an upper insulating layer. A first semiconductor block and a second semiconductor block are produced in the upper insulating layer, and decoupling means are arranged in the upper insulating layer between the first and second semiconductor blocks. The first semiconductor block defines a first capacitor with the lower portion of the substrate, the second semiconductor block defines a second capacitor with the lower portion of the substrate, and the decoupling means includes at least one semiconductor well that defines a decoupling capacitor with the lower portion of the substrate. The capacitance of the decoupling capacitor is higher than the capacitance of each of the first and second capacitors. Also provided is a method of providing noise decoupling in an integrated circuit having a substrate-on-insulator type semiconductor substrate with a lower portion on top of which there is an upper insulating layer.

摘要翻译： 提供一种具有集成电路的类型的半导体器件，其具有通过连接线连接到金属焊盘的连接端子。 集成电路包括绝缘体上半导体衬底，其上部具有上部绝缘层的下部。 第一半导体块和第二半导体块被制造在上绝缘层中，并且去耦装置被布置在第一和第二半导体块之间的上绝缘层中。 第一半导体块限定具有衬底的下部的第一电容器，第二半导体块限定具有衬底的下部的第二电容器，并且去耦装置包括至少一个半导体阱，该半导体阱限定具有下部电极的去耦电容器 部分基板。 去耦电容器的电容高于第一和第二电容器的电容。 还提供了一种在具有绝缘体上半导体衬底的集成电路中提供噪声去耦的方法，其上部具有上绝缘层。

公开(公告)号：US06195784B1

公开(公告)日：2001-02-27

申请号：US09082927

申请日：1998-05-21

申请人： Didier Belot

发明人： Didier Belot

IPC分类号： G06F1100

CPC分类号： H04L7/033

摘要： The present invention relates to a circuit of reception of bits transmitted on an asynchronous signal, including a circuit for providing a clock reconstructed from the asynchronous signal, this clock being used to sample the asynchronous signal to form a synchronous output signal, and a reception error detection circuit. The reception error detection circuit includes an edge detector providing a detection pulse for each edge of predetermined direction of the asynchronous signal; and an alarm circuit activating an alarm signal when an edge of predetermined direction of the synchronous signal occurs outside a detection pulse.

摘要翻译： 本发明涉及一种在异步信号上发送的比特的接收电路，包括用于提供从异步信号重建的时钟的电路，该时钟用于采样异步信号以形成同步输出信号，以及接收错误 检测电路。 接收错误检测电路包括边缘检测器，为异步信号的预定方向的每个边缘提供检测脉冲; 以及当同步信号的预定方向的边缘出现在检测脉冲之外时启动报警信号的报警电路。

公开(公告)号：US08982994B2

公开(公告)日：2015-03-17

申请号：US13328412

申请日：2011-12-16

申请人： Mathieu Egot ,  Jonathan Muller ,  Andreia Cathelin ,  Didier Belot

发明人： Mathieu Egot ,  Jonathan Muller ,  Andreia Cathelin ,  Didier Belot

IPC分类号： H04L25/49 ,  H01Q3/26

CPC分类号： H01Q3/26

摘要： Device comprising processing means (MT), transmission channels (VE1, . . . VEn), an antenna array for transmitting signals comprising a number of antennas (A11 . . . A1n) respectively associated with the transmission channels, a number of digital-analog converters (DAC) and a number of phase-shifting means (MD1, . . . MDn) respectively associated with the antennas, said phase-shifting means (MD1, . . . MDn) being placed between the processing means (MT) and the digital-analog converters (DAC) and including digital all-pass filters of FIR type (PT), the processing means comprising control means (MC) configured to adjust the coefficients and/or the order of the all-pass filters of FIR type.

摘要翻译： 包括处理装置（MT），传输信道（VE1，...，VEn）的装置，用于发送包括分别与传输信道相关联的多个天线（A11 ... A1n）的信号的天线阵列，数字模拟 分别与天线相关联的多个转换器（DAC）和多个移相装置（MD1，...，MDn），所述移相装置（MD1，...，MDn）被放置在处理装置（MT）和 数模转换器（DAC）并且包括FIR类型（PT）的数字全通滤波器，所述处理装置包括被配置为调整FIR类型的全通滤波器的系数和/或顺序的控制装置（MC）。

公开(公告)号：US08188811B2

公开(公告)日：2012-05-29

申请号：US12371468

申请日：2009-02-13

申请人： Andrea Cathelin ,  Didier Belot ,  Alexandre Augusto Shirakawa ,  Eric Kerherve ,  Jean-Marie Pham ,  Pierre Jary

发明人： Andrea Cathelin ,  Didier Belot ,  Alexandre Augusto Shirakawa ,  Eric Kerherve ,  Jean-Marie Pham ,  Pierre Jary

IPC分类号： H03H9/54 ,  H03H3/02

CPC分类号： H03H9/584 ,  H03H9/589 ,  Y10T29/42 ,  Y10T29/49005

摘要： A filter with coupled resonator having a substrate; an acoustic mirror intended to support acoustic resonators, and to isolate these resonators from the substrate; a first structure with an upper resonator and a lower resonator coupled to one another through at least one layer of acoustic coupling; a second structure with an upper resonator and a lower resonator coupled to one another through at least one layer of acoustic coupling; the lower resonators of the first and second structure having the same electrodes. The first and second structures are connected via a fifth resonator for which electrodes and the piezoelectric layer of the lower resonators are of the first and second structure.

摘要翻译： 具有耦合谐振器的滤波器，具有基板; 用于支撑声谐振器的声反射镜，并将这些谐振器与基板隔离; 具有通过至少一个声耦合层彼此耦合的上谐振器和下谐振器的第一结构; 具有通过至少一个声耦合层彼此耦合的上谐振器和下谐振器的第二结构; 第一和第二结构的下部谐振器具有相同的电极。 第一和第二结构通过电极和下部谐振器的压电层具有第一和第二结构的第五谐振器连接。

公开(公告)号：US08115547B2

公开(公告)日：2012-02-14

申请号：US12523367

申请日：2008-01-14

申请人： Didier Belot ,  Yann Deval ,  Eric Kerherve ,  Nathalie Deltimple ,  Pierre Jarry

发明人： Didier Belot ,  Yann Deval ,  Eric Kerherve ,  Nathalie Deltimple ,  Pierre Jarry

IPC分类号： H03G3/20

CPC分类号： H03F1/0266 ,  H03F1/565 ,  H03F3/19 ,  H03F3/217 ,  H03F3/68

摘要： A reconfigurable power amplifier includes at least one amplification circuit (E1, E2), and a circuit (6) for controlling the amplification circuit so as to adapt its operation according to an applied input signal (RFin). The circuit for controlling includes a circuit (4, 5) for modifying the compression point of the amplification circuit and for adapting the gain of the amplification circuit in such a manner as to increase the power added efficiency of the circuit for the modified compression point.

摘要翻译： 可重构功率放大器包括至少一个放大电路（E1，E2）和用于控制放大电路以便根据所施加的输入信号（RFin）适应其操作的电路（6）。 用于控制的电路包括用于修改放大电路的压缩点并用于调整放大电路的增益的电路（4,5），以增加用于修改的压缩点的电路的功率附加效率。

公开(公告)号：US07787853B2

公开(公告)日：2010-08-31

申请号：US11774021

申请日：2007-07-06

申请人： Didier Belot ,  Jean-Baptiste Begueret ,  Yann Deval ,  Hervé Lapuyade

发明人： Didier Belot ,  Jean-Baptiste Begueret ,  Yann Deval ,  Hervé Lapuyade

IPC分类号： H04B1/16

CPC分类号： H03D3/008 ,  H04B1/30

摘要： A method is for reducing a DC component of an input signal transposed into baseband and being generated by a first frequency transposition stage starting from an initial signal and from a transposition signal. The method includes amplifying the transposed input signal in a first amplifier. The first amplifier receives at a DC offset compensation input, a compensation signal extracted from an output signal of a second amplifier subjected to a compensation of a offset DC voltage of the second amplifier. The method also included alternating between receiving at an input of the second amplifier, a first auxiliary signal from an auto-transposition of a transposition signal in a second frequency transposition stage and a second auxiliary signal from a transposition of the initial signal in the second frequency transposition stage with the transposition signal.

摘要翻译： 一种方法是减少转换成基带的输入信号的DC分量，并且由初始信号和转置信号开始由第一频率转置级产生。 该方法包括在第一放大器中放大转置的输入信号。 第一放大器在DC偏移补偿输入处接收从经过补偿第二放大器的偏移DC电压的第二放大器的输出信号提取的补偿信号。 该方法还包括在第二放大器的输入处接收来自第二频率转置级中的转置信号的自动转置的第一辅助信号和来自第二频率中的初始信号的转置的第二辅助信号之间的交替 转置阶段与转置信号。

公开(公告)号：US20090302959A1

公开(公告)日：2009-12-10

申请号：US12478554

申请日：2009-06-04

申请人： Didier Belot ,  Thierry Taris ,  Jean-Baptiste Begueret ,  Yann Deval ,  Julie Cassagne ,  Herve Lapuyade

发明人： Didier Belot ,  Thierry Taris ,  Jean-Baptiste Begueret ,  Yann Deval ,  Julie Cassagne ,  Herve Lapuyade

IPC分类号： H03B28/00

CPC分类号： H03B5/1847

摘要： A distributed oscillator includes an odd number of serially connected amplifying elements. An output of a last amplifying element is looped back to an input of a first amplifying element via a first transmission line. The oscillator oscillates at a first frequency f1. The oscillator further includes circuitry for injecting a control signal onto the input of the first amplifying element. The control signal has a second frequency f2 which is a sub-multiple of the first frequency f1.

摘要翻译： 分布式振荡器包括奇数个串联的放大元件。 最后的放大元件的输出经由第一传输线环回到第一放大元件的输入端。 振荡器以第一频率f1振荡。 振荡器还包括用于将控制信号注入到第一放大元件的输入上的电路。 控制信号具有作为第一频率f1的子倍数的第二频率f2。

公开(公告)号：US20080299936A1

公开(公告)日：2008-12-04

申请号：US12130538

申请日：2008-05-30

申请人： Francois Rivet ,  Didier Belot ,  Yann Deval ,  Jean-Baptiste Begueret ,  Herve Lapuyade ,  Thierry Taris

发明人： Francois Rivet ,  Didier Belot ,  Yann Deval ,  Jean-Baptiste Begueret ,  Herve Lapuyade ,  Thierry Taris

IPC分类号： H04B1/16

CPC分类号： H04B1/28 ,  G11C27/024 ,  H04B1/0007

摘要： A device processes a received radio signal. Circuitry formulates voltage samples of the radio signal. Analog processing of those samples is performed. Then, digital processing is performed on the output of the analog processing. The circuitry for formulating voltage samples is configured to ensure a processing of the samples prior to the digital processing.

摘要翻译： 设备处理接收到的无线电信号。 电路制定无线电信号的电压采样。 进行这些样品的模拟处理。 然后，对模拟处理的输出进行数字处理。 用于配置电压样本的电路被配置为确保在数字处理之前处理样品。