METHOD FOR PROVIDING SHOPPING INFORMATION BY USING ARITIFICIAL NEURAL NETWORK MODEL AND ELECTRONIC DEVICE PERFORMING SAME

    公开(公告)号:US20240378660A1

    公开(公告)日:2024-11-14

    申请号:US18780496

    申请日:2024-07-23

    Inventor: Lok Won KIM

    Abstract: The present disclosure relates to a method for providing shopping information by using artificial neural network model and an electronic device performing the same. The method comprises: acquiring a product image using a camera module, displaying the product image on a display module, recognizing a product information including a trademark and a product information label by inputting the product image into an AI recognition model including an artificial neural network model, converting the product information into a query when the product information is recognized by the AI recognition model, transmitting the query to a server via a communication module, receiving a shopping information corresponding to the product information with respect to one or more shopping malls from the server via the communication module; and displaying the shopping information on the display module. The parameters of the artificial neural network are updated periodically by receiving the parameters via the server.

    NPU WITH CAPABILITY OF BUILT-IN SELF-TEST
    32.
    发明公开

    公开(公告)号:US20240321384A1

    公开(公告)日:2024-09-26

    申请号:US18678072

    申请日:2024-05-30

    Abstract: A neural processing unit (NPU) for testing a component during runtime is provided. The NPU may include a plurality of functional components including a first functional component and a second functional component. At least one of the plurality of functional components may be driven for calculation of an artificial neural network. Another one of the plurality of functional components may be selected as a component under test (CUT). A scan test may be performed on the at least one functional component selected as the CUT. A tester for detecting a defect of an NPU is also provided. The tester may include a component tester configured to communicate with at least one functional component of the NPU, select the at least one functional component as a CUT, and perform a scan test for the selected CUT.

    Soc and system operated based on clock signals having different phases

    公开(公告)号:US20240211741A1

    公开(公告)日:2024-06-27

    申请号:US18594928

    申请日:2024-03-04

    CPC classification number: G06N3/063

    Abstract: A system-on-chip (SoC) may comprise a semiconductor substrate; a first circuitry, disposed on the semiconductor substrate, provided for a first neural processing unit (NPU) configured to perform operations of an artificial neural network (ANN) model; a second circuitry, disposed on the semiconductor substrate, provided for a second NPU configured to perform operations of an ANN model; and a third circuitry, disposed on the semiconductor substrate, configured to generate a control signal to selectively output one or more clock signals, wherein each of the first NPU and the second NPU may include a plurality of processing elements (PEs), and the plurality of PEs may include an adder, a multiplier, and an accumulator, and wherein the one or more clock signals may include an original clock signal and one or more phase-delayed clock signals based on a phase of the original clock signal.

    MEMORY SYSTEM OF ARTIFICIAL NEURAL NETWORK BASED ON ARTIFICIAL NEURAL NETWORK DATA LOCALITY

    公开(公告)号:US20230297519A1

    公开(公告)日:2023-09-21

    申请号:US17430323

    申请日:2020-12-03

    Inventor: Lok Won KIM

    CPC classification number: G06F13/1668 G06F13/18

    Abstract: An artificial neural network memory system includes at least one processor configured to generate a data access request corresponding to an artificial neural network operation; and at least one artificial neural network memory controller configured to sequentially record the data access request to generate an artificial neural network data locality pattern of the artificial neural network operation and generate an advance data access request which predicts a next data access request of the data access request generated by the at least one processor based on the artificial neural network data locality pattern.

    APPARATUS AND METHOD FOR TRANSCEVING FEATURE MAP EXTRACTED USING MPEG-VCM

    公开(公告)号:US20230281982A1

    公开(公告)日:2023-09-07

    申请号:US18317728

    申请日:2023-05-15

    CPC classification number: G06V10/82 G06V10/7715

    Abstract: A neural processing unit (NPU) for decoding video or feature map is provided. The NPU may comprise at least one processing element (PE) to perform an inference using an artificial neural network. The at least one PE may be configured to receive and decode data included in a bitstream. The data included in the bitstream may comprise data of a base layer. Alternatively, the data included in the bitstream may comprise data of the base layer and data of at least one enhancement layer. The data of the base layer included in the bitstream may include a first feature map. The data of the at least one enhancement layer included in the bitstream may include a second feature map.

    SYSTEM-ON-CHIP AND METHOD FOR TESTING COMPONENT IN SYSTEM DURING RUNTIME

    公开(公告)号:US20220206978A1

    公开(公告)日:2022-06-30

    申请号:US17499871

    申请日:2021-10-13

    Inventor: Lok Won KIM

    Abstract: A system on chip (SoC) for testing a component in a system during runtime includes a plurality of functional components; a system bus for allowing the plurality of functional components to communicate with each other; one or more wrappers, each connected to one of the plurality of functional components; and an in-system component tester (ICT). The ICT monitors, via the wrappers, states of the functional components; selects, as a component under test (CUT), at least one functional component in an idle state; tests, via the wrappers, the selected at least one functional component; interrupts the testing step with respect to the selected at least one functional component, based on a detection of a collision with an access from the system bus to the selected at least one functional component; and allows a connection of the at least one functional component to the system bus, based on the interrupting step.

    MEMORY SYSTEM OF AN ARTIFICIAL NEURAL NETWORK BASED ON A DATA LOCALITY OF AN ARTIFICIAL NEURAL NETWORK

    公开(公告)号:US20220138586A1

    公开(公告)日:2022-05-05

    申请号:US17498752

    申请日:2021-10-12

    Inventor: Lok Won KIM

    Abstract: A memory system of an artificial neural network (ANN) includes a processor configured to process an ANN model; and an ANN memory controller configured to control a rearrangement of data of the ANN model stored in a memory and to operate the data of the ANN model stored in the memory in a read-burst mode based on ANN data locality information of the ANN model. The ANN memory controller may receive pre-generated ANN data locality information, or the processor may generate a plurality of data access requests sequentially so that the ANN memory controller may generate the ANN data locality information by monitoring the plurality of data access requests. The ANN memory controller prepares, based on an artificial neural network data locality, data before receiving a request from the processor in order to reduce a delay in the data supply of the memory to the processor.

    SYSTEM AND MEMORY FOR ARTIFICIAL NEURAL NETWORK

    公开(公告)号:US20220137869A1

    公开(公告)日:2022-05-05

    申请号:US17514028

    申请日:2021-10-29

    Inventor: Lok Won KIM

    Abstract: A system for an artificial neural network (ANN) includes a main memory including a dynamic memory cell electrically coupled to a bit line and a word line; and a memory controller configured to selectively omit a restore operation during a read operation of the dynamic memory cell. The main memory may be configured to selectively omit the restoration operation during the read operation of the dynamic memory cell by controlling a voltage applied to the word line. The memory controller may be further configured to determine whether to perform the restoration operation by determining whether data stored in the dynamic memory cell is reused. Thus, the system optimizes an ANN operation of the processor by utilizing the ANN data locality of the ANN model, which operates at a processor-memory level.

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