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公开(公告)号：US20250107317A1
公开(公告)日：2025-03-27
申请号：US18577282
申请日：2023-03-16
Inventor： Xinyu LI , Xinxin WANG , Xiang WAN , Cheng XU , Dandan ZHOU , Ningning WANG
IPC: H10K50/13 , H10K50/15 , H10K59/35 , H10K102/00
Abstract: Provided is an organic light-emitting diode, including a first electrode, a second electrode, at least two emission layers, a first hole transport layer and a second hole transport layer. A color of a mixture of light emitted from the at least two emission layers is white. The at least two emission layers includes a first emission layer and a second emission layer. The first electrode, the first emission layer, the first hole transport layer, the second hole transport layer, the second emission layer, and the second electrode are disposed on a base substrate and are sequentially laminated in a direction going away from the base substrate. A thickness of the second hole transport layer is greater than a first thickness threshold. A ratio of the thickness of the second hole transport layer to a thickness of the first hole transport layer ranges from 15 to 40.
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公开(公告)号：US20250095524A1
公开(公告)日：2025-03-20
申请号：US18557312
申请日：2022-10-27
IPC: G09G3/00 , G09G3/32 , G09G3/3266 , G09G3/3275
Abstract: A display module includes sub-pixels, data lines, a source driving circuit and a processor. Each sub-pixel includes light-emitting sub-units each including a pixel circuit and at least one light-emitting device. A data line is electrically connected to a sub-pixel. The source driving circuit is electrically connected to the data line. The source driving circuit is configured to output a first or second data signal to the sub-pixel through the data line. The processor is configured to: determine location information of a target sub-pixel; and control, according to the location information, the source driving circuit to output the second data signal to the target sub-pixel, so that a brightness of the target sub-pixel is substantially the same as that of a non-target sub-pixel.
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公开(公告)号：US20250089513A1
公开(公告)日：2025-03-13
申请号：US18557297
申请日：2023-02-28
Applicant: BOE Technology Group Co., Ltd.
Inventor： Ying CUI , Donghui YU , Cheng XU , Dandan ZHOU
Abstract: A display substrate, a manufacturing method therefor, and a display device. The display substrate includes: a base substrate; a light-emitting substrate disposed on the base substrate and the light-emitting substrate being configured to emit incident light; a color conversion layer disposed at a side of the light emitting substrate away from the base substrate and the color conversion layer being configured to convert the incident light emitted from the light emitting substrate into light of a specific color; a selective reflection layer disposed on a side of the color conversion layer away from the base substrate and the selective reflection layer being configured to reflect incident light not converted by the color conversion layer to the color conversion layer and to transmit light of the specific color converted by the color conversion layer.
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34.发明申请公开(公告)号：US20250053268A1
公开(公告)日：2025-02-13
申请号：US18697439
申请日：2023-02-24
IPC: G06F3/044
Abstract: The present application provides a touch substrate, a design structure of a touch electrode layer, a display panel, and a display device. The design structure of the touch electrode layer includes connecting portions and conducting wires. The connecting portions and the conducting wires form a plurality of meshes. One connecting portion is connected with four conducting wires. In conducting wires connected with a same connecting portion, at least one side edge of an end portion of at least one conducting wire connected with the connecting portion is provided with a depression, and a bottom edge of the depression joins an edge of the connecting portion. The touch electrode layer is prepared according to the design structure. The display panel includes the touch electrode layer. The display device includes the display panel.
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公开(公告)号：US20250031531A1
公开(公告)日：2025-01-23
申请号：US18282106
申请日：2022-11-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Ying HAN , Pan XU , Xing ZHANG , Guangshuang LV , Donghui ZHAO , Chengyuan LUO , Cheng XU
IPC: H10K59/124 , G09G3/00 , G09G3/3225 , H10K59/122 , H10K59/131
Abstract: A display substrate and a display device, the display substrate includes a base substrate, a pixel driving circuit layer, a first planarization layer, a first metal layer, a second planarization layer, a plurality of first electrodes and a pixel definition layer; the pixel driving circuit layer includes a plurality of pixel driving circuits, the first planarization layer includes a plurality of first vias respectively exposing output terminals of the pixel driving circuits, the first metal layer includes a plurality of data lines extending in a first direction, the pixel definition layer includes a plurality of first definition walls extending in the first direction and a plurality of second definition walls extending in a second direction, and an orthographic projection of at least part of the data lines on the base substrate respectively overlaps with orthographic projections of the plurality of first definition walls on the base substrate.
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Patent Agency Ranking
公开(公告)号：US20250029558A1
公开(公告)日：2025-01-23
申请号：US18281110
申请日：2022-11-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xing ZHANG , Pan XU , Donghui ZHAO , Ying HAN , Chengyuan LUO , Guangshuang LV , Cheng XU , Miao LIU , Dandan ZHOU
IPC: G09G3/3233
Abstract: A driving circuit, a driving method and a display device are provided. The driving circuit includes a first control node control circuit, a second control node control circuit, a first node control circuit and a second node control circuit, wherein, the first control node control circuit is configured to control a potential of the first control node; the second control node control circuit is configured to control a potential of the second control node; the first node control circuit is configured to control a potential of the first node; the second node control circuit is electrically connected to the second control node, a first clock signal terminal and a second node respectively, and is configured to control to connect the first clock signal terminal and the second node under the control of the potential of the second control node.
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公开(公告)号：US20250014520A1
公开(公告)日：2025-01-09
申请号：US18272595
申请日：2022-07-28
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Liu WU , Luke DING , Cheng XU , Miao LIU , Xing YAO
IPC: G09G3/3266 , G11C19/28
Abstract: Provided is a gate driver circuit. The gate driver circuit is applicable to a display panel, wherein the display panel includes a plurality of rows of pixels; the gate driver circuit including at least one gate driver sub-circuit; wherein the gate driver sub-circuit includes: at least two shift register groups, wherein each shift register group includes a plurality of shift register units; at least two first dummy units, wherein the at least two first dummy units are respectively coupled to a same input enable terminal and the at least two shift register groups; and at least two second dummy units, wherein the at least two second dummy units are coupled to the at least two shift register groups.
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公开(公告)号：US20240371887A1
公开(公告)日：2024-11-07
申请号：US18773582
申请日：2024-07-16
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yuhang LU , Fengjuan LIU , Hehe HU , Zhengliang LI , Ce NING , Guangcai YUAN , Dandan ZHOU , Cheng XU
IPC: H01L27/12 , G02F1/1333 , G02F1/1362 , G02F1/1368 , H01L25/075 , H01L29/66 , H01L29/786 , H10K59/121
Abstract: A thin film transistor includes a first active layer, a second active layer, a first electrode, a second electrode and a third electrode. The first active layer includes a first surface away from a substrate. The second active layer includes a second surface in contact with the first surface. The first electrode, the first active layer and the second active layer have an overlapping region. The second electrode, the first active layer and the second active layer have an overlapping region. The third electrode, the first active layer and the second active layer have an overlapping region, and the third electrode is opposite to the second electrode. The second surface is located within the first surface, and a distance between at least part of a border of the second surface and a border of the first surface is less than or equal to 0.5 μm.
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公开(公告)号：US20240251602A1
公开(公告)日：2024-07-25
申请号：US18012648
申请日：2022-11-15
Inventor： Cheng XU , Pan LI , Hongli WANG
IPC: H10K59/122 , G09G3/3225 , H10K59/80
CPC classification number: H10K59/122 , G09G3/3225 , H10K59/873 , G09G2300/0819 , G09G2300/0842
Abstract: A display panel and a display apparatus, including a light emitting structure layer (12), the light emitting structure layer (12) includes a pixel define layer (122). The pixel define layer (122) includes a first dam portion (201) and a second dam portion (202). The first dam portion (201) and the second dam portion (202) are formed a plurality of pixel openings, a distance between a surface of a side of the first dam portion (201) away from the base substrate (10) and a surface of a side of the planarization layer away from the base substrate (10) is smaller than a distance between a surface of a side of the second dam portion (202) away from the base substrate (10) and a surface of a side of the planarization layer away from the base substrate (10).
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40.发明申请公开(公告)号：US20230015542A1
公开(公告)日：2023-01-19
申请号：US17787686
申请日：2021-08-04
Inventor： Ning LIU , Dacheng ZHANG , Cheng XU , Danyang MA , Liusong NI , Jun LIU
Abstract: Provided are an array substrate, a display panel, a display apparatus and a method for manufacturing an array substrate. The array substrate includes: a base substrate; an active layer, which is located on one side of the base substrate, where the active layer includes a channel region, a conductive source region, which is located on one side of the channel region, and a conductive drain region, which is located on the other side of the channel region; and a metal layer, which is located on the side of the active layer that is away from the base substrate, where the metal layer includes a gate electrode and a signal line, which are arranged on the same layer, and the thickness of the gate electrode perpendicular to the base substrate is less than the thickness of the signal line perpendicular to the base substrate.
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