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31.发明授权公开(公告)号：US09703162B2
公开(公告)日：2017-07-11
申请号：US14785808
申请日：2015-03-23
Applicant: Boe Technology Group Co., Ltd.
Inventor： Xiangyan Zhang , Yanbing Wu , Wenbo Li , Pan Li , Qian Jia
IPC: G02F1/1362 , G02F1/1335 , H01L23/48 , H01L21/768 , H01L21/84 , H01L21/82 , H01L23/50 , G02F1/1333 , G02F1/1343 , H01L27/12
CPC classification number: G02F1/136286 , G02F1/133345 , G02F1/133528 , G02F1/13439 , G02F1/136227 , G02F2001/133548 , G02F2001/13629 , G02F2001/136295 , G02F2201/123 , H01L21/768 , H01L21/82 , H01L21/84 , H01L23/481 , H01L23/50 , H01L27/124 , H01L27/1259 , H01L2924/0002 , H01L2924/00
Abstract: The embodiments of the present invention provide a substrate and a manufacturing method thereof, as well as a display device. The substrate comprises: a base substrate, a plurality of gate lines arranged in parallel, a first insulating layer that covers the gate lines, a plurality of data lines located on the first insulating layer and perpendicular to the gate lines, a second insulating layer that covers the data lines, and pixel electrodes of sub-pixel areas enclosed by the data lines and the gate lines; polarizing films that cover the pixel electrodes; and first auxiliary gate lines arranged on the second insulating layer and parallel to the gate lines, at least two portions on each of the first auxiliary gate lines being electrically connected with at least two corresponding portions on the gate line through via holes that penetrate the first insulating layer and the second insulating layer, the first auxiliary gate lines and the polarizing films are formed by performing a same patterning process to a same layer of transparent conductive material. The embodiments of the present invention can reduce signal delay in a display device, and can be used for manufacture of a display.
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公开(公告)号：US09651820B2
公开(公告)日：2017-05-16
申请号：US14500235
申请日：2014-09-29
Applicant: Boe Technology Group Co., Ltd.
Inventor： Pan Li , Yanbing Wu , Wenbo Li , Chunyan Ji , Xiangyan Zhang
IPC: G02F1/1335
CPC classification number: G02F1/133528 , G02F2001/13355
Abstract: A liquid crystal display device includes a liquid crystal panel, a polaroid for polarizing light positioned on a light incident side of the liquid crystal panel, and a polarization analyzer positioned on a light emission side of the liquid crystal panel. The polarization analyzer includes a transparent plate. The transparent plate being arranged at a set angle with a light emission surface of the liquid crystal panel, such that the transparent plate analyzes polarization of light emitted from the light emission surface of the liquid crystal panel. Because the polaroid is used only on the light incident side of the liquid crystal panel, while the transparent plate is used instead of a polaroid on the light emission side of the liquid crystal panel, a reduction in the material cost of the liquid crystal display device can be achieved.
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公开(公告)号：US20170123256A1
公开(公告)日：2017-05-04
申请号：US15127984
申请日：2015-11-17
Applicant: BOE Technology Group Co., Ltd.
IPC: G02F1/1362 , G02F1/1343 , G02F1/1368
CPC classification number: G02F1/13624 , G02F1/134309 , G02F1/13439 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/134345 , G02F2201/121 , G02F2201/123
Abstract: An array substrate and a display device are provided. The array substrate includes a plurality of data lines; a plurality of gate lines; and a plurality of sub-pixel units defined by the gate lines and the data lines intersecting each other. The sub-pixel unit includes a first pixel electrode and a second pixel electrode respectively disposed on two sides of the gate line and a common electrode disposed between the first pixel electrode and the second pixel electrode. At least a first compensation electrode is connected to at least a side of the common electrode, at least a part of projection of it on a plane having the first pixel electrode overlaps the first pixel electrode; and/or at least a second compensation electrode is connected to a side of the first pixel electrode, and at least a part of projection of it on a plane having the common electrode overlaps the common electrode. The display device can have a wide viewing angle.
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公开(公告)号：US20170115533A1
公开(公告)日：2017-04-27
申请号：US15038147
申请日：2015-11-20
Applicant: Boe Technology Group Co., Ltd.
IPC: G02F1/1343 , G02F1/1362 , G02F1/1333 , G02F1/1368
CPC classification number: G02F1/134309 , G02F1/133345 , G02F1/136227 , G02F1/13624 , G02F1/136286 , G02F1/1368 , G02F1/137 , G02F2001/134345 , G02F2001/136218 , G02F2001/13685 , G02F2201/121 , G02F2201/123
Abstract: An array substrate comprising a plurality of pixel units arranged in an array. At least one pixel unit comprises a first pixel electrode and a second pixel electrode. The first pixel electrode is connected with a first thin film transistor and the second pixel electrode is connected with a second thin film transistor; wherein a channel is provided between a source and a drain of the first thin film transistor, the projection of the first pixel electrode on the plane where the channel resides covers at least part of the channel, and the first pixel electrode and the source and drain of the first thin film transistor constitute a top gate thin film transistor. The liquid crystal display panel comprises the array substrate provided by the above technical solution.
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公开(公告)号：US09612495B2
公开(公告)日：2017-04-04
申请号：US14435923
申请日：2014-09-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Hongfei Cheng , Yong Qiao , Jianbo Xian , Wenbo Li , Pan Li
IPC: G09G3/36 , G02F1/1362 , G02F1/1343 , G02F1/1368 , H01L27/12
CPC classification number: G02F1/136286 , G02F1/134363 , G02F1/13439 , G02F1/136213 , G02F1/1368 , G02F2001/136218 , H01L27/124
Abstract: An array substrate and a display device are provided. A common electrode line with the same extending direction as a gate line is disposed at one end near a thin film transistor, and forms a storage capacitor with a drain electrode of the thin film transistor. As compared with the case in the prior art that a common electrode line and a thin film transistor in an array substrate are disposed at both ends of a pixel, respectively, and it is necessary to separately provide a storage capacitance electrode useful for forming a storage capacitor with the common electrode line, the pixel region occupied by the thin film transistor and the common electrode line can be effectively decreased. Thus, the aperture ratio is increased, and the display brightness of an IPS liquid crystal display device is enhanced.
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Patent Agency Ranking
公开(公告)号：US20160342057A1
公开(公告)日：2016-11-24
申请号：US14785808
申请日：2015-03-23
Applicant: Boe Technology Group Co., Ltd.
Inventor： Xiangyan Zhang , Yanbing Wu , Wenbo Li , Pan Li , Qian Jia
IPC: G02F1/1362 , G02F1/1343 , G02F1/1335 , H01L27/12 , G02F1/1333
CPC classification number: G02F1/136286 , G02F1/133345 , G02F1/133528 , G02F1/13439 , G02F1/136227 , G02F2001/133548 , G02F2001/13629 , G02F2001/136295 , G02F2201/123 , H01L21/768 , H01L21/82 , H01L21/84 , H01L23/481 , H01L23/50 , H01L27/124 , H01L27/1259 , H01L2924/0002 , H01L2924/00
Abstract: The embodiments of the present invention provide a substrate and a manufacturing method thereof, as well as a display device. The substrate comprises: a base substrate, a plurality of gate lines arranged in parallel, a first insulating layer that covers the gate lines, a plurality of data lines located on the first insulating layer and perpendicular to the gate lines, a second insulating layer that covers the data lines, and pixel electrodes of sub-pixel areas enclosed by the data lines and the gate lines; polarizing films that cover the pixel electrodes; and first auxiliary gate lines arranged on the second insulating layer and parallel to the gate lines, at least two portions on each of the first auxiliary gate lines being electrically connected with at least two corresponding portions on the gate line through via holes that penetrate the first insulating layer and the second insulating layer, the first auxiliary gate lines and the polarizing films are formed by performing a same patterning process to a same layer of transparent conductive material. The embodiments of the present invention can reduce signal delay in a display device, and can be used for manufacture of a display.
Abstract translation: 本发明的实施例提供了一种基板及其制造方法以及显示装置。 基板包括：基底基板，平行布置的多个栅极线，覆盖栅极线的第一绝缘层，位于第一绝缘层上并垂直于栅极线的多条数据线;第二绝缘层， 覆盖数据线和由数据线和栅极线包围的子像素区域的像素电极; 覆盖像素电极的偏光膜; 以及布置在第二绝缘层上并平行于栅极线的第一辅助栅极线，每个第一辅助栅极线上的至少两个部分通过穿过第一绝缘层的通孔与栅极线上的至少两个对应部分电连接 绝缘层和第二绝缘层，通过对相同的透明导电材料层进行相同的图案化工艺来形成第一辅助栅极线和偏振膜。 本发明的实施例可以减少显示装置中的信号延迟，并且可以用于制造显示器。
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公开(公告)号：US09419019B2
公开(公告)日：2016-08-16
申请号：US14482686
申请日：2014-09-10
Applicant: BOE TECHNOLOGY GROUP CO., LTD
Inventor： Hongfei Cheng , Yong Qiao , Jianbo Xian , Wenbo Li , Pan Li
CPC classification number: H01L27/1222 , H01L27/124
Abstract: An array substrate and a display device is disclosed, for eliminating the interference of transient electromagnetic signals caused by the time-varying voltages on the gate lines and the data lines with the voltages on the pixel electrodes. The array substrate comprises gate lines and data lines disposed on a substrate, and pixel units surrounded and separated by the gate lines and the data lines; and the array substrate further comprises shielding electrodes disposed above at least one of the gate lines and the data lines to cover at least part of the at least one and electrically insulated from the gate lines and the data lines.
Abstract translation: 公开了阵列基板和显示装置，用于消除由栅极线和数据线上的时变电压引起的瞬时电磁信号与像素电极上的电压的干扰。 阵列基板包括设置在基板上的栅极线和数据线，以及由栅极线和数据线包围和分离的像素单元; 并且阵列基板还包括设置在至少一个栅极线和数据线之上的屏蔽电极，以覆盖至少一个并且与栅极线和数据线电绝缘的至少一部分。
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38.发明公开公开(公告)号：US20240071284A1
公开(公告)日：2024-02-29
申请号：US17766696
申请日：2021-06-29
IPC: G09G3/20 , G09G3/3233
CPC classification number: G09G3/2096 , G09G3/2074 , G09G3/3233 , G09G2300/0842 , G09G2320/0233 , G09G2360/16
Abstract: A method for driving a display panel is provided. The method includes receiving image data of a frame of image, the image data including a plurality of initial grayscale values respectively for a plurality of subpixels in the display panel; and converting the image data into a converted image data including a plurality of converted grayscale values respectively for the plurality of subpixels. Converting the image data includes compensating a respective initial grayscale value for a respective subpixel by at least a respective delay-compensating factor to obtain a respective converted grayscale value. With respect to a p-th subpixel and a q-th subpixel respectively connected to a respective data line and having a same initial grayscale values, a p-th delay-compensating factor for the p-th subpixel is greater than a q-th delay-compensating factor for the q-th subpixel.
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公开(公告)号：US11527556B2
公开(公告)日：2022-12-13
申请号：US16329796
申请日：2018-08-10
Applicant: BOE Technology Group Co., Ltd.
IPC: H01L27/32 , H01L27/12 , G02F1/1362
Abstract: Disclosed are an array substrate and a display device. The array substrate includes: a plurality of sub-pixel elements in an array, wherein each row of sub-pixel elements includes a common electrode; the common electrode includes a plurality of sub-common electrodes, each of which corresponds to one of the sub-pixel elements; the sub-common electrode includes a body connection section, a plurality of comb teeth connected with the body connection section, and a shielding section connected with the body connection section, wherein the first comb teeth and the shielding section are on the same side of the body connection section, and the shielding section is on the outermost side of the first comb teeth; and the body connection sections of two adjacent sub-common electrodes in the common electrode are on two opposite sides. The body connection sections of two adjacent sub-common electrodes in each common electrode are arranged on two opposite sides.
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40.发明授权公开(公告)号：US11413441B2
公开(公告)日：2022-08-16
申请号：US16831100
申请日：2020-03-26
Inventor： Yongchun Lu , Hui Li , Pan Li , Chunping Long
Abstract: Embodiments of the present disclosure provide a preparation delivery assembly including: a first substrate, a second substrate, and at least two needles of different lengths, each of which is a hollow needle having a hollow structure; wherein two side walls are provided between the first substrate and the second substrate to define a first chamber for containing a preparation by the first substrate, the second substrate, and the two side walls; at least one first channel that is in communication with the first chamber is provided in the second substrate in a direction substantially perpendicular to the second substrate; and the needles are arranged on a surface of the second substrate distal to the first substrate, and each of the needles is in communication with the first chamber through the at least one first channel to deliver the preparation.
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