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31.发明授权公开(公告)号：US10534493B2
公开(公告)日：2020-01-14
申请号：US16356418
申请日：2019-03-18
Inventor： Xiaodong Xie , Zouming Xu , Ming Hu , Ming Zhang , Min He , Jian Tian , Jing Wang
IPC: G06F3/044
Abstract: The present application discloses a mutual capacitive touch substrate comprising a matrix of a plurality of electrode units, adjacent electrode units complementarily matching each other. Each electrode unit comprises a first electrode having a first undulating boundary; a second electrode having a second undulating boundary; and a fill pattern between the first electrode and the second electrode, having an undulating boundary substantially complementary to corresponding portions of the first undulating boundary and the second undulating boundary. The first electrode, the second electrode, and the fill pattern in a same electrode unit are electrically isolated from each other.
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32.发明申请公开(公告)号：US20190371245A1
公开(公告)日：2019-12-05
申请号：US16334114
申请日：2018-01-04
Inventor： Can Yuan , Zhidong Yuan , Yongqian Li , Pan Xu , Wenchao Bao , Min He
IPC: G09G3/3258 , G09G3/3233 , G09G3/3275
Abstract: The present disclosure relates to a pixel driving compensation circuit. The pixel driving compensation circuit can detect and compensate a driving current of a sub-pixel in a pixel unit. The pixel unit includes first, second, and third sub-pixels and the first to third sub-pixels respectively include first, second, and third driving transistors. The pixel driving compensation circuit includes a first switching sub-circuit configured to be turned on in a first period to transmit a driving current output from the first driving transistor to a first detection line, second switching sub-circuit configured to be turned on in a second period to transmit a driving current output from the second driving transistor to a first detection line, and a third switching sub-circuit configured to be turned on in the first period to transmit a driving current output from the third driving transistor to a second detection line.
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公开(公告)号：US20180293952A1
公开(公告)日：2018-10-11
申请号：US15573948
申请日：2017-05-15
Inventor： Min He , Haixia Xu , Dongxu Han , Meng Li
IPC: G09G3/36 , H03K17/284
CPC classification number: G09G3/3677 , G09G2230/00 , G09G2300/0408 , G09G2310/08 , G11C19/28 , H03K17/284
Abstract: A gate integrated driving circuit for a display panel. The gate integrated driving circuit may comprise N reset circuits. For each of the N reset circuits, a first terminal thereof may be coupled to a reference signal terminal a second terminal thereof may be coupled to signal output terminals of a set of input and output circuits respectively, a third terminal thereof may be coupled to control terminals of driving circuits of the set of input and output circuits respectively, and a fourth terminal thereof may be coupled to a clock signal terminal coupled to input terminals of the driving circuits of the set of input and output circuits respectively. N may be an integer of at least 3. The set of input and output circuits may contain two or more input and output circuits.
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公开(公告)号：US09909037B2
公开(公告)日：2018-03-06
申请号：US15235490
申请日：2016-08-12
Inventor： Jing Wang , Xiaodong Xie , Min He , Ming Zhang
IPC: C09J9/00 , C23F1/02 , C09K13/06 , C09K13/04 , C23F1/10 , C04B41/53 , C04B41/91 , C09K13/08 , G06F3/041 , H05K1/09 , C09J7/02
CPC classification number: C09J9/00 , C04B41/5353 , C04B41/91 , C08K2201/014 , C09J7/20 , C09J2201/28 , C09J2203/318 , C09J2205/102 , C09K13/04 , C09K13/06 , C09K13/08 , C23F1/02 , C23F1/10 , G06F3/041 , G06F2203/04103 , H05K1/09 , H05K3/06
Abstract: An etching adhesive tape for manufacturing a touch screen and a manufacturing method thereof, and an etching method are disclosed. The etching adhesive tape includes a base sheet and a functional layer disposed on the base sheet, the functional layer includes a first region corresponding to a region to be etched, and the first region includes an etching paste.
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公开(公告)号：US09801267B2
公开(公告)日：2017-10-24
申请号：US15219935
申请日：2016-07-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
CPC classification number: H05K1/0237 , H05K1/025 , H05K1/0268
Abstract: The present invention provides a wiring structure of high frequency signal wires and a PCB board including the wiring structure of high frequency signal wires. A test part is formed by extending a high frequency signal wire from a connection end connected with a solder pad, and a test window corresponding to a position of the test part is provided on a copper foil which covers the solder pad and the test part, to expose the high frequency signal wire, such that a high frequency signal transmitted via the high frequency signal wire can be directly tested at the test window. Thus, circular test points used in the prior art can be removed, to effectively solve the problem of insufficient space on a PCB; accordingly, lengths of the high frequency signal wires become more precise, so as to ensure a synchronization of transmission of the high frequency signal wires.
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Patent Agency Ranking
公开(公告)号：US12265296B2
公开(公告)日：2025-04-01
申请号：US17440277
申请日：2021-01-22
Inventor： Huayu Sang , Xiaodong Xie , Min He , Xue Zhao , Tianyu Zhang , Tengfei Zhong , Xinxiu Zhang , Bin Pang
IPC: G02F1/13357 , H01L25/075 , H01L33/62
Abstract: An embodiment of the present disclosure provides a driving backplane, which includes: a base substrate; a first conductive layer on the base substrate; a first planarization layer on the base substrate and in a region outside a pattern of the first conductive layer; a second planarization layer on a side of the first conductive layer and the first planarization layer distal to the base substrate; and a second conductive layer on a side of the second planarization layer distal to the base substrate, wherein an orthographic projection of the first conductive layer on the base substrate partially overlaps with an orthographic projection of the second conductive layer on the base substrate.
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公开(公告)号：US12183281B2
公开(公告)日：2024-12-31
申请号：US18034374
申请日：2022-06-29
Inventor： Min He , Xiaolong Wei , Song Meng , Qiang Fei , Jingbo Xu , Cheng Xu , Miao Liu , Pengfei Yin
IPC: G09G3/3233 , G09G3/20
Abstract: Disclosed are a display panel and a display method thereof, and a display apparatus. The display panel includes multiple pixel units, a pixel unit includes multiple sub-pixels, a sub-pixel includes a pixel drive circuit, a sense compensation circuit, and an element to be driven, and the display panel further includes a detection unit and a compensator; the pixel drive circuit is configured to drive the element to be driven in active time; the sense compensation circuit is configured to sense electrical characteristics of the element to be driven in blank time; the detection unit is configured to detect whether a currently displayed picture is a still picture, send a first notification to the compensator when the currently displayed picture is a still picture, and send a second notification to the compensator when the currently displayed picture is a non-still picture.
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公开(公告)号：US12062620B2
公开(公告)日：2024-08-13
申请号：US17611801
申请日：2020-12-08
Inventor： Qin Zeng , Zouming Xu , Chunjian Liu , Jian Tian , Xintao Wu , Jie Lei , Jie Wang , Xiaodong Xie , Min He , Xinxiu Zhang , Xue Zhao , Huayu Sang , Wenjie Xu
IPC: H01L25/16 , H01L23/538 , H01L33/62 , H01L23/00
CPC classification number: H01L23/5386 , H01L25/167 , H01L33/62 , H01L24/05 , H01L24/06 , H01L2224/05552 , H01L2224/0615
Abstract: An array substrate includes connecting leads, a signal channel region extending in a first direction, a first power voltage lead, and a second power voltage lead. Any one of the signal channel region includes at least two control region columns extending in the first direction, and any one of the control region columns includes a plurality of control regions arranged along the first direction. Any one of the control regions includes a pad connecting circuit and a first pad group for bonding a microchip, the first pad group is electrically connected to the first power voltage lead. The pad connection circuit includes a plurality of second pad groups, and is provided with a first end electrically connected to the first pad group, and a second end electrically connected to the second power voltage lead.
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公开(公告)号：US11988925B2
公开(公告)日：2024-05-21
申请号：US17432557
申请日：2020-10-28
Inventor： Min He , Jing Wang , Xiaodong Xie , Tianyu Zhang , Xue Zhao , Tengfei Zhong , Xinxiu Zhang , Huayu Sang , Feng Qu
IPC: G02F1/1345
CPC classification number: G02F1/1345
Abstract: The embodiment of the present disclosure provides a driving backplate including a base substrate, and an insulation layer and a plurality of conductive structures on the base substrate. The insulation layer insulates the plurality of conductive structures from each other. The plurality of conductive structures includes a first conductive layer and a second conductive layer sequentially stacked along a direction away from the base substrate. At least one portion of a region in which the first conductive layer is in contact with the second conductive layer includes a flat contact region. An opening is formed at a position in the insulation layer corresponding to the conductive structure. An edge of the opening in the insulation layer is between the first conductive layer and the second conductive layer and is correspondingly in edge regions of the first conductive layer and the second conductive layer.
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公开(公告)号：US11960690B2
公开(公告)日：2024-04-16
申请号：US17615133
申请日：2020-12-25
Inventor： Xue Zhao , Xiaodong Xie , Min He , Tengfei Zhong , Xinxiu Zhang , Tianyu Zhang , Huayu Sang
CPC classification number: G06F3/0446 , G03D15/04 , G06F3/0445 , G06F2203/04103 , G06F2203/04112
Abstract: The present disclosure relates to a method for fabricating a touch substrate, a touch substrate and a touch device. The method includes: forming, through a splicing exposure process, a first electrode layer including a metal strip in an edge region thereof and a first metal mesh pattern connected with the metal strip; forming, on one side of the first electrode layer and through a splicing exposure process, a second electrode layer including a metal strip in an edge region thereof and a second metal mesh pattern connected with the metal strip and insulated from the first metal mesh pattern, the metal strip of the first electrode layer directly contacting the metal strip of the second electrode layer to form a metal stack; and forming a wire electrically connected with one of the first and metal mesh patterns of the first and second electrode layers by using the metal stack.
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