公开(公告)号：US08373243B2

公开(公告)日：2013-02-12

申请号：US12986032

申请日：2011-01-06

Applicant: Hsin-Chih Tai ,  Vincent Venezia ,  Yin Qian ,  Duli Mao ,  Keh-Chiang Ku

Inventor： Hsin-Chih Tai ,  Vincent Venezia ,  Yin Qian ,  Duli Mao ,  Keh-Chiang Ku

IPC: H01L31/12

CPC classification number: H01L27/14643 ,  H01L27/14636 ,  H01L27/1464

Abstract: A backside illuminated imaging sensor with a seal ring support includes an epitaxial layer having an imaging array formed in a front side of the epitaxial layer. A metal stack is coupled to the front side of the epitaxial layer, wherein the metal stack includes a seal ring formed in an edge region of the imaging sensor. An opening is included that extends from the back side of the epitaxial layer to a metal pad of the seal ring to expose the metal pad. The seal ring support is disposed on the metal pad and within the opening to structurally support the seal ring.

Abstract translation: 具有密封环支撑件的背面照明成像传感器包括具有形成在外延层的前侧的成像阵列的外延层。 金属叠层耦合到外延层的前侧，其中金属堆叠包括形成在成像传感器的边缘区域中的密封环。 包括从外延层的背面延伸到密封环的金属焊盘以露出金属焊盘的开口。 密封环支撑件设置在金属垫上并且在开口内，以在结构上支撑密封环。

公开(公告)号：US20120319242A1

公开(公告)日：2012-12-20

申请号：US13164563

申请日：2011-06-20

Applicant: Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Keh-Chiang Ku ,  Yin Qian ,  Gang Chen ,  Rongsheng Yang ,  Howard Rhodes

Inventor： Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Keh-Chiang Ku ,  Yin Qian ,  Gang Chen ,  Rongsheng Yang ,  Howard Rhodes

IPC: H01L29/02 ,  H01L31/02

CPC classification number: H01L21/26513 ,  H01L21/76237 ,  H01L27/1463 ,  H01L27/14689

Abstract: Forming a doped isolation region in a substrate during manufacture of an image sensor. A method of an aspect includes forming a hardmask layer over the substrate, and forming a photoresist layer over the hardmask layer. An opening is formed in the photoresist layer over an intended location of the doped isolation region. An opening is etched in the hardmask layer by exposing the hardmask layer to one or more etchants through the opening. The opening in the hardmask layer may have a width of less than 0.4 micrometers. The doped isolation region may be formed in the substrate beneath the opening in the hardmask layer by performing a dopant implantation that introduces dopant through the opening in the hardmask layer. The method of an aspect may include forming sidewall spacers on sidewalls of the opening in the hardmask layer and using the sidewall spacers as a dopant implantation mask.

Abstract translation: 在图像传感器的制造期间在衬底中形成掺杂的隔离区域。 一种方面的方法包括在衬底上形成硬掩模层，以及在硬掩模层上形成光致抗蚀剂层。 在掺杂隔离区域的预定位置上的光致抗蚀剂层中形成开口。 通过将硬掩模层暴露于通过开口的一个或多个蚀刻剂，在硬掩模层中蚀刻开口。 硬掩模层中的开口可以具有小于0.4微米的宽度。 可以通过执行通过硬掩模层中的开口引入掺杂剂的掺杂剂注入，在硬掩模层中的开口下方的衬底中形成掺杂隔离区。 一方面的方法可以包括在硬掩模层中的开口的侧壁上形成侧壁间隔物，并且使用侧壁间隔物作为掺杂剂注入掩模。

公开(公告)号：US08329497B2

公开(公告)日：2012-12-11

申请号：US12984452

申请日：2011-01-04

Applicant: Yin Qian ,  Howard E. Rhodes ,  Hsin-Chih Tai ,  Vincent Venezia ,  Duli Mao

Inventor： Yin Qian ,  Howard E. Rhodes ,  Hsin-Chih Tai ,  Vincent Venezia ,  Duli Mao

IPC: H01L21/00

CPC classification number: H01L27/14603 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14641 ,  H01L27/14647 ,  H01L27/14652

Abstract: A backside illuminated imaging sensor includes a semiconductor layer and an infrared detecting layer. The semiconductor layer has a front surface and a back surface. An imaging pixel includes a photodiode region formed within the semiconductor layer. The infrared detecting layer is disposed above the front surface of the semiconductor layer to receive infrared light that propagates through the imaging sensor from the back surface of the semiconductor layer.

Abstract translation: 背面照明成像传感器包括半导体层和红外检测层。 半导体层具有前表面和后表面。 成像像素包括形成在半导体层内的光电二极管区域。 红外线检测层设置在半导体层的前表面上方，以从半导体层的背面接收从成像传感器传播的红外光。

公开(公告)号：US08318529B1

公开(公告)日：2012-11-27

申请号：US13566638

申请日：2012-08-03

Applicant: Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Yin Qian ,  Howard E. Rhodes

Inventor： Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Yin Qian ,  Howard E. Rhodes

IPC: H01L21/00

CPC classification number: H01L27/14698 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689

Abstract: A technique for fabricating an image sensor including a pixel circuitry region and a peripheral circuitry region includes fabricating front side components on a front side of the image sensor. A dopant layer is implanted on a backside of the image sensor. A anti-reflection layer is formed on the backside and covers a first portion of the dopant layer under the pixel circuitry region while exposing a second portion of the dopant layer under the peripheral circuitry region. The first portion of the dopant layer is laser annealed from the backside of the image sensor through the anti-reflection layer. The anti-reflection layer increases a temperature of the first portion of the dopant layer during the laser annealing.

Abstract translation: 一种用于制造包括像素电路区域和外围电路区域的图像传感器的技术包括在图像传感器的正面上制造前侧部件。 掺杂剂层植入图像传感器的背面。 在背面形成防反射层，并且在像素电路区域下方覆盖掺杂剂层的第一部分，同时在外围电路区域下方暴露掺杂剂层的第二部分。 掺杂剂层的第一部分通过抗反射层从图像传感器的背面激光退火。 抗反射层在激光退火期间增加掺杂剂层的第一部分的温度。

公开(公告)号：US08293629B2

公开(公告)日：2012-10-23

申请号：US12755088

申请日：2010-04-06

Applicant: Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Yin Qian ,  Howard E. Rhodes

Inventor： Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Yin Qian ,  Howard E. Rhodes

IPC: H01L21/425

CPC classification number: H01L27/14689 ,  H01L21/26586 ,  H01L27/1464 ,  H01L27/14643 ,  H04N5/378

Abstract: Embodiments of a process for forming a photodetector region in a CMOS pixel by dopant implantation, the process comprising masking a photodetector area of a surface of a substrate for formation of the photodetector region, positioning the substrate at a plurality of twist angles, and at each of the plurality of twist angles, directing dopants at the photodetector area at a selected tilt angle. Embodiments of a CMOS pixel comprising a photodetector region formed in a substrate, the photodetector region comprising overlapping first and second dopant implants, wherein the overlap region has a different dopant concentration than the non-overlapping parts of the first and second implants, a floating diffusion formed in the substrate, and a transfer gate formed on the substrate between the photodetector and the transfer gate. Other embodiments are disclosed and claimed.

Abstract translation: 用于通过掺杂剂注入在CMOS像素中形成光电检测器区域的方法的实施例，该方法包括掩蔽用于形成光电检测器区域的基板的表面的光电检测器区域，将基板定位在多个扭曲角度 在多个扭转角度中，以选定的倾斜角将光电探测器区域上的掺杂剂引导。 CMOS像素的实施例包括形成在衬底中的光电检测器区域，所述光电检测器区域包括重叠的第一和第二掺杂剂注入，其中所述重叠区域具有与所述第一和第二植入物的非重叠部分不同的掺杂剂浓度， 形成在基板上，以及形成在光电检测器和传输门之间的基板上的传输门。 公开和要求保护其他实施例。

公开(公告)号：US20120104525A1

公开(公告)日：2012-05-03

申请号：US13344312

申请日：2012-01-05

Applicant: Fei Wu ,  Hongjun Li ,  Yin Qian ,  Hsin-Chih Tai ,  Howard E. Rhodes ,  Jizhang Shan

Inventor： Fei Wu ,  Hongjun Li ,  Yin Qian ,  Hsin-Chih Tai ,  Howard E. Rhodes ,  Jizhang Shan

IPC: H01L27/146 ,  H01L31/0232

CPC classification number: H01L27/14627 ,  G02B3/0018 ,  H01L27/1464 ,  H01L27/14685

Abstract: An example image sensor includes first, second, and third micro-lenses. The first micro-lens is in a first color pixel and has a first curvature and a first height. The second micro-lens is in a second color pixel and has a second curvature and a second height. The third micro-lens is in a third color pixel and has a third curvature and a third height. The first curvature is the same as both the second curvature and the third curvature and the first height is greater than the second height and the second height is greater than the third height, such that light absorption depths for the first, second, and third color pixels are the same.

Abstract translation: 示例性图像传感器包括第一，第二和第三微透镜。 第一微透镜是第一颜色像素并且具有第一曲率和第一高度。 第二微透镜处于第二颜色像素中并且具有第二曲率和第二高度。 第三微透镜是第三色像素，具有第三曲率和第三高度。 第一曲率与第二曲率和第三曲率都相同，第一高度大于第二高度，第二高度大于第三高度，使得第一，第二和第三颜色的光吸收深度 像素是相同的。

公开(公告)号：US20120019695A1

公开(公告)日：2012-01-26

申请号：US12843578

申请日：2010-07-26

Applicant: Yin Qian ,  Hsin-Chih Tai ,  Duli Mao ,  Vincent Venezia ,  Howard E. Rhodes

Inventor： Yin Qian ,  Hsin-Chih Tai ,  Duli Mao ,  Vincent Venezia ,  Howard E. Rhodes

IPC: H04N5/335

CPC classification number: H01L27/14623 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14643 ,  H01L27/14685

Abstract: An apparatus and technique for fabricating an image sensor including the dark sidewall films disposed between adjacent color filters. The image sensor further includes an array of photosensitive elements disposed in a substrate layer, a color filter array (“CFA”) including CFA elements having at least two different colors disposed on a light incident side of the substrate layer, and an array of microlenses disposed over the CFA. Each microlens is aligned to direct light incident on the light incident side of the image sensor through a corresponding CFA element to a corresponding photosensitive element. The dark sidewall films are disposed on sides of the CFA elements and separate adjacent ones of the CFA elements having different colors.

Abstract translation: 一种用于制造包括设置在相邻滤色器之间的暗侧壁膜的图像传感器的装置和技术。 图像传感器还包括设置在基底层中的感光元件的阵列，包括设置在基底层的光入射侧的具有至少两种不同颜色的CFA元件的滤色器阵列（“CFA”）和微透镜阵列 处理终审法院。 每个微透镜对准以将入射到图像传感器的光入射侧的光通过相应的CFA元件引导到相应的感光元件。 黑色侧壁膜设置在CFA元件的侧面上，并且分离具有不同颜色的相邻的CFA元件。

公开(公告)号：US08071429B1

公开(公告)日：2011-12-06

申请号：US12954151

申请日：2010-11-24

Applicant: Yin Qian ,  Hsin-Chih Tai ,  Duli Mao ,  Vincent Venezia ,  Wei Zheng ,  Keh-Chiang Ku ,  Howard E. Rhodes

Inventor： Yin Qian ,  Hsin-Chih Tai ,  Duli Mao ,  Vincent Venezia ,  Wei Zheng ,  Keh-Chiang Ku ,  Howard E. Rhodes

IPC: H01L21/304

CPC classification number: H01L21/78 ,  H01L27/14632 ,  H01L27/1464 ,  H01L27/14687

Abstract: Embodiments of a method for separating dies from a wafer having first and second sides. The process embodiment includes masking the first side of the wafer, the mask including openings therein to expose parts of the first side substantially aligned with scribe lines of the wafer. The process embodiment also includes etching from the exposed parts of the first side of the wafer until an intermediate position between the first and second sides and sawing the remainder of the wafer, starting from the intermediate position until reaching the second surface.

Abstract translation: 用于从具有第一和第二侧的晶片分离模具的方法的实施例。 该工艺实施例包括掩蔽晶片的第一侧，掩模包括其中的开口，以暴露基本上与晶片划线对齐的第一侧的部分。 工艺实施例还包括从晶片的第一侧的暴露部分进行蚀刻，直到第一和第二面之间的中间位置，并从中间位置开始到达第二表面，锯切晶片的其余部分。

公开(公告)号：US20110241090A1

公开(公告)日：2011-10-06

申请号：US12755088

申请日：2010-04-06

Applicant: Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Yin Qian ,  Howard E. Rhodes

Inventor： Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Yin Qian ,  Howard E. Rhodes

IPC: H01L31/112 ,  H01L21/66

CPC classification number: H01L27/14689 ,  H01L21/26586 ,  H01L27/1464 ,  H01L27/14643 ,  H04N5/378

Abstract: Embodiments of a process for forming a photodetector region in a CMOS pixel by dopant implantation, the process comprising masking a photodetector area of a surface of a substrate for formation of the photodetector region, positioning the substrate at a plurality of twist angles, and at each of the plurality of twist angles, directing dopants at the photodetector area at a selected tilt angle. Embodiments of a CMOS pixel comprising a photodetector region formed in a substrate, the photodetector region comprising overlapping first and second dopant implants, wherein the overlap region has a different dopant concentration than the non-overlapping parts of the first and second implants, a floating diffusion formed in the substrate, and a transfer gate formed on the substrate between the photodetector and the transfer gate. Other embodiments are disclosed and claimed.

Abstract translation: 用于通过掺杂剂注入在CMOS像素中形成光电检测器区域的方法的实施例，该方法包括掩蔽用于形成光电检测器区域的基板的表面的光电检测器区域，将基板定位在多个扭曲角度 在多个扭转角度中，以选定的倾斜角将光电探测器区域上的掺杂剂引导。 CMOS像素的实施例包括形成在衬底中的光电检测器区域，所述光电检测器区域包括重叠的第一和第二掺杂剂注入，其中所述重叠区域具有与所述第一和第二植入物的非重叠部分不同的掺杂剂浓度， 形成在基板上，以及形成在光电检测器和传输门之间的基板上的传输门。 公开和要求保护其他实施例。

公开(公告)号：US20110227184A1

公开(公告)日：2011-09-22

申请号：US12727115

申请日：2010-03-18

Applicant: Duli Mao ,  Vincent Venezia ,  Howard Rhodes ,  Hsin Chih Tai ,  Yin Qian

Inventor： Duli Mao ,  Vincent Venezia ,  Howard Rhodes ,  Hsin Chih Tai ,  Yin Qian

IPC: H01L27/146 ,  H01L31/18

CPC classification number: H01L27/14636 ,  H01L27/14683

Abstract: An apparatus of one aspect includes a photodetector array, and a peripheral region at a periphery of the photodetector array. A thinner interconnect line corresponding to the photodetector array is disposed within one or more insulating layers. A thicker interconnect line corresponding to the peripheral region is disposed within the one or more insulating layers. Other apparatus, methods, and systems are also disclosed.

Abstract translation: 一个方面的装置包括光电检测器阵列和在光电检测器阵列的外围的周边区域。 对应于光电检测器阵列的更薄的互连线设置在一个或多个绝缘层内。 对应于外围区域的较厚的互连线设置在一个或多个绝缘层内。 还公开了其他装置，方法和系统。