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28 条记录 (耗时 0.02 秒)

    Semiconductor Device
    21.
    发明申请
    Semiconductor Device 审中-公开
    半导体器件

    公开(公告)号：US20080224125A1

    公开(公告)日：2008-09-18

    申请号：US11632293

    申请日：2005-06-23

    申请人： Takahisa Tanabe ,  Masami Tsuchida

    发明人： Takahisa Tanabe ,  Masami Tsuchida

    IPC分类号： H01L51/00

    CPC分类号： H01L51/0516 ,  H01L27/1214 ,  H01L27/13 ,  H01L29/4908

    摘要： The disclosed is a semiconductor device which comprises a circuit which is formed on a substrate and which includes an insulated gate type semiconductor field-effect transistor element or an TFT element, wherein as compared with the electrostatic capacitance per a unit area of a gate insulating film at a channel part of the transistor element, the electrostatic capacitance per a unit area of a insulating film at the other portion of overlap part between electrodes or wiring lines is small. In the semiconductor device which has an insulated gate type semiconductor field-effect transistor element or a TFT element, a high mutual conductance is obtained and the absolute value of gate threshold voltage is repressed while the adverse influence to the circuit operation by means of the parasitic capacity is repressed.

    摘要翻译： 所公开的是一种半导体器件，其包括形成在衬底上并且包括绝缘栅型半导体场效应晶体管元件或TFT元件的电路，其中与栅极绝缘膜的每单位面积的静电电容相比 在晶体管元件的沟道部分，电极或布线之间的重叠部分的另一部分处的绝缘膜的单位面积的静电电容小。 在具有绝缘栅型半导体场效应晶体管元件或TFT元件的半导体器件中，获得高互导性，并且通过寄生电阻对栅极阈值电压的绝对值进行抑制，同时对电路操作产生不利影响 能力受到压制。

    Image display apparatus
    23.
    发明申请
    Image display apparatus 审中-公开
    图像显示装置

    公开(公告)号：US20050088379A1

    公开(公告)日：2005-04-28

    申请号：US10968993

    申请日：2004-10-21

    申请人： Masami Tsuchida

    发明人： Masami Tsuchida

    IPC分类号： H01L51/50 ,  G09G3/10 ,  G09G3/20 ,  G09G3/30 ,  G09G3/32 ,  H05B33/14

    CPC分类号： G09G3/3258 ,  G09G3/2014 ,  G09G3/3291 ,  G09G2300/0833 ,  G09G2300/0842 ,  G09G2310/0259 ,  G09G2310/066 ,  G09G2320/0285 ,  G09G2320/0295 ,  G09G2320/043 ,  G09G2320/048

    摘要： An image display apparatus is disclosed. The image display apparatus comprises a display panel in which are arranged a plurality of display cells each having an emission element; a driving unit which generates a data signal based on a grayscale value of an image signal and applies the data signal to the display cell to cause the emission element to emit light; a driving time measurement unit which measures a cumulative driving time of the emission element; a table memory which stores a compensation coefficient for compensation for aging of the emission element with respect to the cumulative driving time; and an adjustment circuit which uses the compensation coefficient to adjust the grayscale value of the image signal, for each of the display cells.

    摘要翻译： 公开了一种图像显示装置。 图像显示装置包括显示面板，其中布置有多个具有发射元件的显示单元; 驱动单元，其基于图像信号的灰度值生成数据信号，并将所述数据信号施加到所述显示单元，以使所述发射元件发光; 驱动时间测量单元，其测量所述发射元件的累积驱动时间; 一个表存储器，存储相对于累积行驶时间补偿发光元件老化的补偿系数; 以及对于每个显示单元，使用补偿系数来调整图像信号的灰度值的调整电路。

    Light emitting display device in which light emitting elements are sequentially connected to a first drive source and a second drive source during emission of light and a method therefore
    24.
    发明授权
    Light emitting display device in which light emitting elements are sequentially connected to a first drive source and a second drive source during emission of light and a method therefore 失效
    在发光期间发光元件依次连接到第一驱动源和第二驱动源的发光显示装置及其方法

    公开(公告)号：US06680719B2

    公开(公告)日：2004-01-20

    申请号：US10224330

    申请日：2002-08-21

    申请人： Masami Tsuchida ,  Shinichi Ishizuka

    发明人： Masami Tsuchida ,  Shinichi Ishizuka

    IPC分类号： G09G332

    CPC分类号： G09G3/3216 ,  G09G3/22 ,  G09G3/3266 ,  G09G3/3283 ,  G09G2310/0251 ,  G09G2310/0256 ,  G09G2320/0233 ,  G09G2320/0252 ,  G09G2320/043 ,  G09G2330/04

    摘要： A light emitting display device having a plurality of light emitting elements connected to intersecting points of a plurality of anode lines and cathode lines arranged in a matrix. Either one of the anode lines and the cathode lines are used as scanning lines, and the others are used as driving lines. While one of the scanning lines is scanned during a scanning period, a driving source is synchronously connected to one of the driving lines so that a light emitting element connected to an intersecting point of the one scanning line and the one driving line is caused to emit light. Immediately after the scanning period of the one scanning line is started, a first driving source is connected to the one driving line, and subsequently, in exchange for the first driving source, a second driving source is connected to the one driving line.

    摘要翻译： 一种发光显示装置，具有连接到以矩阵形式布置的多个阳极线和阴极线的交点的多个发光元件。 将阳极线和阴极线中的任一个用作扫描线，其它的用作驱动线。 当在扫描周期期间扫描一条扫描线时，驱动源与其中一条驱动线路同步连接，使得连接到一条扫描线和一条驱动线的交叉点的发光元件被发射 光。 在一条扫描线的扫描周期开始之后，将第一驱动源连接到一条驱动线，然后，为了交换第一驱动源，将第二驱动源连接到一条驱动线。

    Offset compensation circuit
    26.
    发明授权
    Offset compensation circuit 失效
    偏移补偿电路

    公开(公告)号：US4965867A

    公开(公告)日：1990-10-23

    申请号：US234874

    申请日：1988-08-22

    申请人： Masami Tsuchida ,  Ichiro Miyake ,  Tokihiro Takahashi ,  Shinichi Wakumura ,  Yoshimi Iso ,  Takao Arai ,  Hiroo Okamoto

    发明人： Masami Tsuchida ,  Ichiro Miyake ,  Tokihiro Takahashi ,  Shinichi Wakumura ,  Yoshimi Iso ,  Takao Arai ,  Hiroo Okamoto

    IPC分类号： H03M1/02 ,  H03M1/06 ,  H03M1/10 ,  H04L25/06

    CPC分类号： H03M1/1023 ,  H03M1/0607 ,  H04L25/067 ,  H03M1/02

    摘要： An offset compensation circuit for compensating a DC offset which occurs in a circuit line including an A/D converter or an A/D and D/A converter in which not only the polarity bit of digital data but also information concerning the amplitude of an analog input signal are applied to an integrator to precisely compensate an offset voltage in a circuit line. The level of a proper offset compensation voltage is provided even when an input analog signal such as a music signal is absent, and when an A/D and D/A converter is provided which can perform both A/D conversion and D/A conversion the DC offset can be precisely compensated shortly after the change of the mode from D/A conversion to A/D conversion.

    摘要翻译： 一种偏移补偿电路，用于补偿在包括A / D转换器或A / D和D / A转换器的电路线中发生的DC偏移，其中不仅数字数据的极性位，而且还涉及与模拟 输入信号被施加到积分器以精确地补偿电路线路中的偏移电压。 即使没有诸如音乐信号的输入模拟信号，并且当提供可以执行A / D转换和D / A转换的A / D和D / A转换器时，也提供适当的偏移补偿电压的电平 在将模式从D / A转换改变为A / D转换之后，DC偏移可以很快精确地补偿。

    Dither circuit responsive to zero input signal level
    27.
    发明授权
    Dither circuit responsive to zero input signal level 失效
    抖动电路响应零输入信号电平

    公开(公告)号：US4937576A

    公开(公告)日：1990-06-26

    申请号：US440175

    申请日：1989-11-22

    申请人： Junichi Yoshio ,  Masami Suzuki ,  Masami Tsuchida ,  Kiyoshi Iwai

    发明人： Junichi Yoshio ,  Masami Suzuki ,  Masami Tsuchida ,  Kiyoshi Iwai

    IPC分类号： H03M1/04 ,  H03M1/06 ,  H03M1/08 ,  H03M1/20 ,  H03M1/66

    CPC分类号： H03M1/0641 ,  H03M1/66

    摘要： A dither circuit including an adder for receiving an input signal and a dither signal which is generated by a dither signal generator, a level detection circuit for detecting the signal level of the input signal, and a dither control circuit for stopping the feeding of the dither signal to the adder when the level detection circuit detects that the signal level of the input signal is zero.

    摘要翻译： 一种抖动电路，包括用于接收输入信号的加法器和由抖动信号发生器产生的抖动信号，用于检测输入信号的信号电平的电平检测电路，以及用于停止抖动馈送的抖动控制电路 当电平检测电路检测到输入信号的信号电平为零时，向加法器发信号。