Controller for one type of NAND flash memory for emulating another type of NAND flash memory
    21.
    发明授权
    Controller for one type of NAND flash memory for emulating another type of NAND flash memory 有权
    用于模拟另一种NAND闪存的一种类型的NAND闪存的控制器

    公开(公告)号:US08001316B2

    公开(公告)日:2011-08-16

    申请号:US11964741

    申请日:2007-12-27

    IPC分类号: G06F12/12

    CPC分类号: G11C16/10

    摘要: A controller for one type of NAND flash memory device that emulates another type of NAND flash memory device. The controller may include a host NAND interface to receive host data from a NAND host device, and a data aggregator for aggregating the host data with complementary data, to thereby create device data that is storable in a device page of an array of NAND flash memory cells of the NAND flash memory device. After creating the device data the controller writes the device data into a device page of the NAND flash memory cells. The controller also includes a data parser to parse host data from device data when data read operations are executed by the controller. If required, the controller uses the data parser to parse complementary data from device data to create device data when data writing operations are executed by the controller.

    摘要翻译: 一种用于模拟另一类NAND闪存器件的NAND闪存器件的控制器。 控制器可以包括用于从NAND主机设备接收主机数据的主机NAND接口和用于利用补充数据聚集主机数据的数据聚合器,从而创建可存储在N​​AND闪存阵列的设备页面中的设备数据 NAND闪存设备的单元。 创建设备数据后,控制器将设备数据写入NAND闪存单元的设备页面。 当控制器执行数据读取操作时,控制器还包括一个数据解析器,用于从设备数据中解析主机数据。 如果需要,当控制器执行数据写入操作时,控制器使用数据解析器来解析设备数据中的补充数据以创建设备数据。

    Storage device coordinator and a host device that includes the same
    24.
    发明授权
    Storage device coordinator and a host device that includes the same 有权
    存储设备协调器和包含相同的主机设备

    公开(公告)号:US09495116B2

    公开(公告)日:2016-11-15

    申请号:US11964060

    申请日:2007-12-26

    IPC分类号: G06F12/00 G06F3/06

    摘要: A storage device coordinator intercepts a memory command issued by a host device and intended for a target storage device which is one of a plurality of storage devices, and, if the memory command is not optimal, transforms the memory command into one or more storage commands, each being associated with a respective storage device selected from the plurality of storage devices according to an optimization rule. A host device is also provided, which includes the storage device coordinator. A data storage system is also provided, which includes the storage device coordinator.

    摘要翻译: 存储设备协调器拦截由主机设备发出的并且用于作为多个存储设备之一的目标存储设备的存储器命令,并且如果存储器命令不是最佳的,则将存储器命令转换成一个或多个存储命令 每个与根据优化规则从多个存储设备中选择的相应存储设备相关联。 还提供了一个主机设备,其中包括存储设备协调器。 还提供了一种数据存储系统,其中包括存储设备协调器。

    Method and host device for packing and dispatching read and write commands
    25.
    发明授权
    Method and host device for packing and dispatching read and write commands 有权
    用于打包和调度读写命令的方法和主机设备

    公开(公告)号:US09141296B2

    公开(公告)日:2015-09-22

    申请号:US13546528

    申请日:2012-07-11

    IPC分类号: G06F12/00 G06F3/06 G06F13/38

    摘要: A method and host device for packing and dispatching read and write commands are provided. In one embodiment, a host device receives commands from at least one application, wherein the commands include read commands and write commands. The host device stores the commands in the memory. The host device then selects the read commands from the memory and packs them together but separately from the write commands. The same thing is done for the write commands. The host device then sends the packed read commands and the packed write commands to the storage device. In another embodiment, the host device determines when to send the packed commands to the storage device based on at least one parameter.

    摘要翻译: 提供了一种用于打包和分派读写命令的方法和主机设备。 在一个实施例中,主机设备从至少一个应用接收命令,其中所述命令包括读命令和写命令。 主机设备将命令存储在存储器中。 然后,主机设备从存储器中选择读取命令,并将它们打包在一起,而与写命令分开。 写入命令也是一样的。 主机设备然后将打包的读取命令和打包的写入命令发送到存储设备。 在另一个实施例中,主机设备基于至少一个参数确定何时将压缩命令发送到存储设备。

    Direct multi-level cell programming
    26.
    发明授权
    Direct multi-level cell programming 有权
    直接多级单元编程

    公开(公告)号:US08885410B2

    公开(公告)日:2014-11-11

    申请号:US13598264

    申请日:2012-08-29

    IPC分类号: G11C16/04 G11C16/26

    摘要: A method is performed in a data storage device that includes a controller coupled to a non-volatile memory. The non-volatile memory includes a group of storage elements. Each storage element is configured to store multiple data bits. Data is sent from the controller to the non-volatile memory and first bits corresponding to a first portion of the data are stored into the group of storage elements during a first write stage. Each storage element of the group of storage elements stores at least one bit of the first bits upon completion of the first write stage. Second bits corresponding to a second portion of the data are sent to a second memory without sending the first bits to the second memory. The second bits are retrieved from the second memory and at least the second bits are stored into the group of storage elements during a second write stage.

    摘要翻译: 在包括耦合到非易失性存储器的控制器的数据存储设备中执行方法。 非易失性存储器包括一组存储元件。 每个存储元件被配置为存储多个数据位。 数据从控制器发送到非易失性存储器,并且对应于数据的第一部分的第一位在第一写入阶段被存储到存储元件组中。 存储元件组中的每个存储元件在第一写入阶段完成时存储第一位的至少一个位。 对应于数据的第二部分的第二位被发送到第二存储器,而不将第一位发送到第二存储器。 从第二存储器检索第二位,并且在第二写入阶段期间至少将第二位存储到存储元件组中。

    Method and Host Device for Packing and Dispatching Read and Write Commands
    27.
    发明申请
    Method and Host Device for Packing and Dispatching Read and Write Commands 有权
    包装和调度读写命令的方法和主机设备

    公开(公告)号:US20130326141A1

    公开(公告)日:2013-12-05

    申请号:US13546528

    申请日:2012-07-11

    IPC分类号: G06F12/00

    摘要: A method and host device for packing and dispatching read and write commands are provided. In one embodiment, a host device receives commands from at least one application, wherein the commands include read commands and write commands. The host device stores the commands in the memory. The host device then selects the read commands from the memory and packs them together but separately from the write commands. The same thing is done for the write commands. The host device then sends the packed read commands and the packed write commands to the storage device. In another embodiment, the host device determines when to send the packed commands to the storage device based on at least one parameter.

    摘要翻译: 提供了一种用于打包和分派读写命令的方法和主机设备。 在一个实施例中,主机设备从至少一个应用接收命令,其中所述命令包括读命令和写命令。 主机设备将命令存储在存储器中。 然后,主机设备从存储器中选择读取命令,并将它们打包在一起,而与写命令分开。 写入命令也是一样的。 主机设备然后将打包的读取命令和打包的写入命令发送到存储设备。 在另一个实施例中,主机设备基于至少一个参数确定何时将压缩命令发送到存储设备。

    Transparent self-hibernation of non-volatile memory system
    28.
    发明授权
    Transparent self-hibernation of non-volatile memory system 有权
    透明自适应非易失性存储器系统

    公开(公告)号:US08181046B2

    公开(公告)日:2012-05-15

    申请号:US12260744

    申请日:2008-10-29

    申请人: Alon Marcu Ori Stern

    发明人: Alon Marcu Ori Stern

    IPC分类号: G06F1/32 G06F1/00 G06F12/00

    摘要: A memory system self-initiates hibernation mode and responds to host commands issued during hibernation within a host protocol timeout period. Hibernation mode is entered after controller state data has been stored and while no host command to the memory system is pending. Power to volatile data storage is diminished during hibernation mode. Upon receiving a host command during hibernation mode, power is restored and a reduced portion of the controller state data is read from non-volatile memory. A removable data storage device or a portable electronic device with embedded data storage may be constructed with such a self-hibernating memory system.

    摘要翻译: 存储器系统自主启动休眠模式,并响应主机协议超时期间休​​眠期间发出的主机命令。 在控制器状态数据已被存储并且没有主机命令到存储器系统之前进入休眠模式。 在休眠模式下,易失性数据存储的功耗降低。 在休眠模式期间接收到主机命令时,恢复供电并且从非易失性存储器读取控制器状态数据的减少的部分。 具有嵌入式数据存储器的可移动数据存储设备或便携式电子设备可以用这种自行休眠存储器系统来构建。

    Controller for One Type of NAND Flash Memory for Emulating Another Type of NAND Flash Memory
    29.
    发明申请
    Controller for One Type of NAND Flash Memory for Emulating Another Type of NAND Flash Memory 有权
    用于模拟另一种类型的NAND闪存的一种类型的NAND闪存的控制器

    公开(公告)号:US20110271045A1

    公开(公告)日:2011-11-03

    申请号:US13181477

    申请日:2011-07-12

    IPC分类号: G06F12/02

    CPC分类号: G11C16/10

    摘要: A method of executing an erasing instruction to erase host data from a flash memory device is provided. The method initiates with receiving from a host device an erase instruction to erase host data from an array of NAND flash memory cells grouped into separately-erasable device blocks, each device block including multiple device pages, the host data being a portion of device data that is stored in a device block. The host data is marked as erased, and a message is sent to the host device indicating that the host data has been erased.

    摘要翻译: 提供了一种执行从闪速存储器件擦除主机数据的擦除指令的方法。 该方法通过从主机设备接收擦除指令,从分组为可单独擦除的设备块的NAND闪存单元的阵列中擦除主机数据,每个设备块包括多个设备页面,主机数据是设备数据的一部分, 存储在设备块中。 主机数据被标记为擦除,并且向主机设备发送消息,指示主机数据已被擦除。

    STORAGE DEVICE COORDINATOR AND A HOST DEVICE THAT INCLUDES THE SAME
    30.
    发明申请
    STORAGE DEVICE COORDINATOR AND A HOST DEVICE THAT INCLUDES THE SAME 有权
    存储设备协调器和包括其的主机设备

    公开(公告)号:US20090172333A1

    公开(公告)日:2009-07-02

    申请号:US11964060

    申请日:2007-12-26

    IPC分类号: G06F12/00

    摘要: A storage device coordinator intercepts a memory command issued by a host device and intended for a target storage device which is one of a plurality of storage devices, and, if the memory command is not optimal, transforms the memory command into one or more storage commands, each being associated with a respective storage device selected from the plurality of storage devices according to an optimization rule. A host device is also provided, which includes the storage device coordinator. A data storage system is also provided, which includes the storage device coordinator.

    摘要翻译: 存储设备协调器拦截由主机设备发出的并且用于作为多个存储设备之一的目标存储设备的存储器命令,并且如果存储器命令不是最佳的,则将存储器命令转换成一个或多个存储命令 每个与根据优化规则从多个存储设备中选择的相应存储设备相关联。 还提供了一个主机设备,其中包括存储设备协调器。 还提供了一种数据存储系统,其中包括存储设备协调器。