公开(公告)号：US09620388B2

公开(公告)日：2017-04-11

申请号：US14941865

申请日：2015-11-16

Applicant: Texas Instruments Incorporated

Inventor： You Chye How ,  Maria Christina Bernardo Violante

IPC: H01L21/00 ,  H01L21/48 ,  H01L25/00 ,  H01L25/18 ,  H01L21/56 ,  H01L23/00 ,  H01L23/495 ,  H01L21/683 ,  H01L25/065

CPC classification number: H01L21/4821 ,  H01L21/4828 ,  H01L21/565 ,  H01L21/6836 ,  H01L23/00 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/49548 ,  H01L23/49575 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/94 ,  H01L25/0655 ,  H01L25/18 ,  H01L25/50 ,  H01L2221/68377 ,  H01L2224/27003 ,  H01L2224/27436 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32013 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83385 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/1515 ,  H01L2924/181 ,  H01L2924/301 ,  H01L2924/0665 ,  H01L2224/45099 ,  H01L2224/27 ,  H01L2924/00 ,  H01L2924/0781

Abstract: A method of making an integrated circuit package. A leadframe having a die attach paddle surrounded by lead portions is formed. Middle channels underlying in said die attach paddle portion in a region thereof adapted to receive a first die are formed.

公开(公告)号：US20160240390A1

公开(公告)日：2016-08-18

申请号：US15138298

申请日：2016-04-26

Applicant: Texas Instruments Incorporated

Inventor： Lee Han Meng@ Eugene Lee ,  You Chye How

IPC: H01L21/48

CPC classification number: H01L21/4828 ,  H01L21/4825 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49548 ,  H01L24/97 ,  H01L2924/181 ,  H01L2924/00

Abstract: A method for forming a multilevel leadframe for an integrated circuit is provided. A conductive sheet is etched from one side to form a thinner region within a frame region for leads lines and bond pads. The conductive sheet is etched to form a plurality of bond pads in a first level of the thinner region arranged in at least a first row and a second row. Each bond pad has a pad width and is separated from an adjacent bond pad by a bond pad clearance distance. The conductive sheet is etched from an opposite side to form a plurality of lead lines in a second level of the thinner region having a line width and is separated from an adjacent lead line by at least a lead line clearance distance. Each bond pad of the second plurality of bond pads is connected to one of the plurality of lead lines on the second level that is routed between adjacent bond pads in the first row, so that the lead lines are routed on a different level from the bond pads.

Abstract translation: 提供一种用于形成用于集成电路的多电平引线框架的方法。 从一侧蚀刻导电片，以在用于引线和接合焊盘的框架区域内形成更薄的区域。 蚀刻导电片以在布置在至少第一行和第二行中的较薄区域的第一级中形成多个接合焊盘。 每个接合焊盘具有焊盘宽度，并且通过接合焊盘间隙距离与相邻接合焊盘分离。 导电片从相对侧蚀刻，以在具有线宽的较薄区域的第二级中形成多条引线，并且与相邻引线相隔至少一条引线间隙距离。 第二多个接合焊盘中的每个接合焊盘连接到第二级上的多条引线之一，该引线在第一行中的相邻接合焊盘之间布线，使得引线在与焊接不同的层级上布线 垫

公开(公告)号：US20150108626A1

公开(公告)日：2015-04-23

申请号：US14581006

申请日：2014-12-23

Applicant: Texas Instruments Incorporated

Inventor： Lee Han Meng@ Eugene Lee ,  You Chye How

IPC: H01L23/495 ,  H01L21/48

CPC classification number: H01L21/4828 ,  H01L21/4825 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49548 ,  H01L24/97 ,  H01L2924/181 ,  H01L2924/00

Abstract: A multilevel leadframe for an integrated circuit package is provided that has a plurality of lead lines formed in a first level and bond pads formed in a second level. A first set of bond pads is arranged in a first row and are separated from an adjacent bond pad by a bond pad clearance distance. A second set of bond pads is arranged in second row adjacent the first row of bond pads. Each bond pad in the second row may be connected to one of the plurality of lead lines on the first level that is routed between adjacent bond pads in the first row. Since the bond pads in the first row are on a different level then the lead lines, the bond pads may be spaced close together.

Abstract translation: 提供了一种用于集成电路封装的多级引线框架，其具有形成在第一级中的多条引线和形成在第二级中的接合焊盘。 第一组接合焊盘被布置在第一行中并且通过接合焊盘间隙距离与相邻接合焊盘分开。 第二组接合焊盘被布置在与第一排接合焊盘相邻的第二行中。 第二行中的每个接合焊盘可以连接到在第一级中的相邻接合焊盘之间路由的第一级上的多条引线之一。 由于第一行中的接合焊盘处于不同的电平，所以引线，接合焊盘可以彼此靠近地间隔开。

公开(公告)号：US20150053586A1

公开(公告)日：2015-02-26

申请号：US13973760

申请日：2013-08-22

Applicant: Texas Instruments Incorporated

Inventor： You Chye How ,  Siew Kee Lee ,  Huay Yann Tay

IPC: B65D85/62

CPC classification number: H05K13/0084 ,  Y10T428/13

Abstract: A carrier tape for transporting electronic components having a linearly displaceable continuous web and a plurality of pocket structures connected to the continuous web. The pocket structures are adapted to receive the electronic components. Each of the plurality of pocket structures defines an opening to enable passage of the electronic component into the pocket structure. Each of the pocket structures define at least one tab that is adapted to retain an electronic component in the pocket structure without a closure member.

Abstract translation: 一种用于运送具有线性可移动的连续卷材的电子部件的载带和连接到连续卷材的多个袋结构。 口袋结构适于接收电子部件。 多个凹穴结构中的每一个限定了一个开口，以使得电子部件能够通过到口袋结构中。 每个凹穴结构限定至少一个凸片，其适于将电子部件保持在口袋结构中而没有闭合部件。