公开(公告)号：US11569153B2

公开(公告)日：2023-01-31

申请号：US16819902

申请日：2020-03-16

Applicant: Texas Instruments Incorporated

Inventor： Enis Tuncer ,  John Paul Tellkamp

IPC: H01L21/48 ,  H01L23/495 ,  H01L43/04

Abstract: A leadframe includes leads or lead terminals, a plurality of folded features including i) support features positioned within an area defined in at least one dimension by the leads or the lead terminals configured for supporting at least one of a die pad and a first pad and a second pad spaced apart from one another, or ii) current carrying features. At least one of the folded features includes a planar portion and a folded edge structure that curves upwards at an angle of at least 45° relative to the planar portion. The folded features are configured to provide an effective increase in thickness to reduce the deformation observed in assembly.

公开(公告)号：US20230014718A1

公开(公告)日：2023-01-19

申请号：US17376150

申请日：2021-07-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Enis Tuncer

IPC: H01L23/34 ,  H01L23/31 ,  H01L23/495 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package includes a first set of leads, a temperature sensor proximate the first set of leads, a second set of leads, a semiconductor die, a first electrical connection between the temperature sensor and the semiconductor die, a second electrical connection between the semiconductor die and the second set of leads, and mold compound at least partially covering the temperature sensor, the semiconductor die, the first set of leads and the second set of leads. The mold compound physically separates the semiconductor die from the temperature sensor and the first set of leads.

公开(公告)号：US11538738B1

公开(公告)日：2022-12-27

申请号：US17390900

申请日：2021-07-31

Applicant: Texas Instruments Incorporated

Inventor： Enis Tuncer

IPC: H01L23/495 ,  H01L21/66 ,  H01L23/58 ,  H01L23/528

Abstract: In a described example, an apparatus includes: a package substrate including a die pad configured for mounting a semiconductor die, a first lead connected to the die pad, and a second lead and a third lead; and a semiconductor die including a temperature sensor mounted on the die pad. The semiconductor die includes a first metallization layer being a metallization layer closest to the active surface of the semiconductor die, and successive metallization layers overlying the previous metallization layer, the metallization layers including a respective conductor layer in a dielectric material for the particular metallization layer and conductive vias; and the temperature sensor formed of the conductor layer in an uppermost metallization layer and coupled to the second lead and to the third lead. The semiconductor die includes a high voltage ring formed in the uppermost metallization layer, spaced from and surrounding the temperature sensor.

公开(公告)号：US20220319966A1

公开(公告)日：2022-10-06

申请号：US17219830

申请日：2021-03-31

Applicant: Texas Instruments Incorporated

Inventor： Enis Tuncer

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48 ,  H01L23/34

Abstract: In a described example, an apparatus includes: a package substrate having a die pad configured for mounting a semiconductor die, a first lead connected to the die pad, and a second lead spaced from and electrically isolated from the die pad; a spacer dielectric mounted on the die pad; a semiconductor die including a temperature sensor mounted on the spacer dielectric; electrical connections coupling the semiconductor die to the second lead; and mold compound covering the semiconductor die, the die pad, the electrical connections, and a portion of the package substrate, with portions of the first lead and portions of the second lead exposed from the mold compound to form terminals for a packaged temperature sensor device.

公开(公告)号：US20220208676A1

公开(公告)日：2022-06-30

申请号：US17138906

申请日：2020-12-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Enis Tuncer ,  Alejandro Hernandez-Luna

IPC: H01L23/525 ,  H01L23/528 ,  H01L23/48 ,  H01L23/495 ,  H01L23/31

Abstract: A semiconductor package includes a metallic pad and leads, a semiconductor die including a semiconductor substrate attached to the metallic pad, and a conductor including a sacrificial fuse element above the semiconductor substrate, the sacrificial fuse element being electrically coupled between one of the leads and at least one terminal of the semiconductor die, and a multilayer dielectric between the sacrificial fuse element and the semiconductor substrate, the multilayer dielectric forming one or more planar gaps beneath a profile of the sacrificial fuse element.

公开(公告)号：US20210159403A1

公开(公告)日：2021-05-27

申请号：US17142539

申请日：2021-01-06

Applicant: Texas Instruments Incorporated

Inventor： Ming Li ,  Yiqi Tang ,  Jie Chen ,  Enis Tuncer ,  Usman Mahmood Chaudhry ,  Tony Ray Larson ,  Rajen Manicon Murugan ,  John Paul Tellkamp ,  Satyendra Singh Chauhan

IPC: H01L43/14 ,  H01L43/06 ,  G01R15/20 ,  H01L23/495 ,  G01R33/07

Abstract: A Hall-effect sensor package includes and an IC die including a Hall-Effect element and a leadframe including leads on a first side providing a first field generating current (FGC) path including ≥1 first FGC input pin coupled by a reduced width first curved head over or under the Hall-effect sensor element to ≥1 first FGC output pin, and second leads on a second side of the package. Some leads on the second side are attached to bond pads on the IC die including the output of the Hall-effect element. A clip is attached at one end to the first FGC input pin and at another end to a location on the first FGC output pin, having a reduced width second curved head in between that is over or under the Hall-effect sensor element opposite the first head.

公开(公告)号：US10284172B2

公开(公告)日：2019-05-07

申请号：US14698616

申请日：2015-04-28

Applicant: Texas Instruments Incorporated

Inventor： Enis Tuncer ,  Abram Castro

IPC: H03H9/10 ,  H01L41/08

Abstract: An assembly including an electrical connection substrate formed of material having a Young's modulus of less than about 10 MPa, an acoustic device die having opposite end portions mounted on and electrically connected to the electrical connection substrate and a mold compound layer encapsulating the acoustic device die and interfacing with the substrate.

公开(公告)号：US20250147089A1

公开(公告)日：2025-05-08

申请号：US18500184

申请日：2023-11-02

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Juan Herbsommer ,  Baher Haroun ,  Enis Tuncer

IPC: G01R29/12

Abstract: An electric field sensor includes a gas cell having a first terminal and a second terminal. A ground plane is proximate the gas cell. A transmitter has an input and an output. The transmitter's output is communicatively coupled to the first terminal of the gas cell. A receiver has an input and an output. The receiver's input is communicatively coupled to the second terminal. A processing circuit has a processing circuit input and a processing circuit output. The processing circuit input is coupled to the output of the receiver, and the processing circuit output is coupled to the input of the transmitter.

公开(公告)号：US20230387043A1

公开(公告)日：2023-11-30

申请号：US18450291

申请日：2023-08-15

Applicant: Texas Instruments Incorporated

Inventor： Enis Tuncer

IPC: H01L23/64 ,  H01L23/31 ,  H01L23/495 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L23/645 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/4952 ,  H01L21/565 ,  H01L23/49589 ,  H01L28/10 ,  H01L21/4825 ,  H01L23/49575

Abstract: An electronic device includes a magnetic assembly with a multilevel lamination or metallization structure having a core layer, dielectric layers and conductive features formed in metal layers on or between the dielectric layers in respective planes of orthogonal first and second directions and stacked along an orthogonal third direction. The conductive features include first and second patterned conductive features forming first and second windings, first and second conductive capacitor plates, and first and second conductive field plates, in which the first conductive capacitor plate is between the first conductive field plate and the core layer along the third direction and the second conductive capacitor plate is between the second conductive field plate and the core layer along the third direction.

公开(公告)号：US20230187121A1

公开(公告)日：2023-06-15

申请号：US17546287

申请日：2021-12-09

Applicant: Texas Instruments Incorporated

Inventor： Enis Tuncer

IPC: H01F27/32 ,  H01L23/495 ,  H01L23/58 ,  H01F27/02 ,  H01F27/28 ,  H01L23/522 ,  H01L25/00 ,  H01F41/04

CPC classification number: H01F27/323 ,  H01L23/49575 ,  H01L23/58 ,  H01F27/022 ,  H01F27/2804 ,  H01L23/5227 ,  H01L25/50 ,  H01F41/043 ,  H01L23/49555 ,  H01F2027/2809 ,  H01L25/18

Abstract: A magnetic assembly includes a multilevel lamination or metallization structure with a core dielectric layer, dielectric stack layers, a high permittivity dielectric layer, and first and second patterned conductive features, the dielectric stack layers having a first relative permittivity, the high permittivity dielectric layer extends between and contacting the first patterned conductive feature and one of the dielectric stack layers or the core dielectric layer, the high permittivity dielectric layer has a second relative permittivity, and the second relative permittivity is at least 1.5 times the first relative permittivity to mitigate dielectric breakdown in isolation products.