公开(公告)号：US11676641B2

公开(公告)日：2023-06-13

申请号：US17461332

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chieh Lee ,  Yi-Ching Liu ,  Chia-En Huang ,  Chang Jen-Yuan ,  Yih Wang

IPC: G11C5/06 ,  G11C5/02 ,  H01L23/48 ,  H01L27/24 ,  H01L43/12 ,  H01L45/00 ,  H01L27/108 ,  H01L27/22 ,  H01L43/02

CPC classification number: G11C5/06 ,  G11C5/025 ,  H01L23/481 ,  H01L27/108 ,  H01L27/222 ,  H01L27/2481 ,  H01L43/02 ,  H01L43/12 ,  H01L45/122 ,  H01L45/16

Abstract: A memory device includes a first layer, wherein the first layer includes a first memory array, a first row decoder circuit, and a first column sensing circuit. The memory device includes a second layer disposed with respect to the first layer in a vertical direction. The second layer includes a first peripheral circuit operatively coupled to the first memory array, the first row decoder circuit, and the first column sensing circuit. The memory device includes a plurality of interconnect structures extending along the vertical direction. At least a first one of the plurality of interconnect structures operatively couples the second layer to the first layer.

公开(公告)号：US20230022115A1

公开(公告)日：2023-01-26

申请号：US17726086

申请日：2022-04-21

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chieh Lee ,  Chia-En Huang ,  Yi-Ching Liu ,  Wen-Chang Cheng ,  Yih Wang

IPC: H01L27/11597 ,  G11C11/22 ,  H01L27/11587 ,  H01L27/1159 ,  H01L27/11592 ,  G11C5/04 ,  G11C5/06

Abstract: In some embodiments, an integrated circuit (IC) device includes an active semiconductor layer, a circuitry formed within the active semiconductor layer, a region including conductive layers formed above the active semiconductor layer, and a memory module formed in the region. The memory device includes a three-dimensional array of memory cells, each adapted to store a weight value, and adapted to generate at each memory cell a signal indicative of a product between the stored weight value and an input signal applied to the memory cell. The memory module is further adapted to transmit the product signals from the memory cell simultaneously in the direction of the active semiconductor layer.