公开(公告)号：US09269429B2

公开(公告)日：2016-02-23

申请号：US14665127

申请日：2015-03-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun-Kook Park ,  Dae-Seok Byeon ,  Yeong-Taek Lee ,  Bo-Geun Kim ,  Yong-Kyu Lee ,  Hyo-Jin Kwon

IPC: G11C11/00 ,  G11C13/00

CPC classification number: G11C13/0069 ,  G11C5/025 ,  G11C13/0023 ,  G11C13/0033 ,  G11C2213/71

Abstract: A resistive memory device includes a memory cell array including a plurality vertically stacked layers having one layer designated as an interference-free layer and another layer designated as an access prohibited layer, wherein the interference-free layer and the access prohibited layer share a connection with at least one signal line and access operations directed to memory cells the access prohibited layer are prohibited.

Abstract translation: 电阻式存储器件包括存储单元阵列，该存储单元阵列包括多个垂直层叠的层，其中一层被指定为无干扰层，另一层指定为禁止访问层，其中无干扰层和禁止访问层共享与 禁止至少一条信号线和针对存储器单元访问禁止层的访问操作。