公开(公告)号：US11133412B2

公开(公告)日：2021-09-28

申请号：US16540090

申请日：2019-08-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Ho Do

IPC: H01L29/78 ,  H02M7/537 ,  H01L27/02 ,  H01L23/522

Abstract: Integrated circuit devices including standard cells are provided. The standard cells may include a P-type vertical field effect transistor (VFET) including a first channel region and a first top source/drain region sequentially stacked on a substrate in a vertical direction, an N-type VFET including a second channel region and a second top source/drain region sequentially stacked on the substrate in the vertical direction, and a top contact layer contacting both the first top source/drain region and the second top source/drain region.

公开(公告)号：US11043564B2

公开(公告)日：2021-06-22

申请号：US16520717

申请日：2019-07-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Ho Do ,  Seung Hyun Song

IPC: H01L29/417 ,  H01L27/02 ,  H01L29/78 ,  H01L27/088

Abstract: Integrated circuit devices may include active regions spaced apart from each other in a direction. The active regions may include a first pair of active regions, a second pair of active regions, and a third pair of active regions. The first pair of active regions may be spaced apart from each other by a first distance in the direction, the second pair of active regions may be spaced apart from each other by the first distance in the direction, and the third pair of active regions may be spaced apart from each other by the first distance in the direction. The second pair of active regions may be spaced apart from the first pair of active regions and the third pair of active regions by a second distance in the direction, and the first distance may be shorter than the second distance.

公开(公告)号：US10985272B2

公开(公告)日：2021-04-20

申请号：US16434276

申请日：2019-06-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Ho Do

IPC: H01L29/66 ,  H01L29/78 ,  H01L27/092 ,  H01L29/417 ,  H01L29/10 ,  H01L29/423 ,  H01L27/02

Abstract: Integrated circuit devices including standard cells are provided. The standard cells may a first vertical field effect transistor (VFET) having a first conductivity type, a second VFET having a second conductivity type, and a third VFET having the first conductivity type. The first VFET may include a first channel region protruding from a substrate, and the first channel region has a first length. The second VFET may include a second channel region protruding from the substrate, and the second channel region has a second length. The third VFET may include a third channel region protruding from the substrate. The first channel region, the second channel region, and third channel region may be spaced apart from each other and may be sequentially arranged along a direction, and the second length may be greater than 1.5 times the first length.