公开(公告)号：US20240113020A1

公开(公告)日：2024-04-04

申请号：US18466289

申请日：2023-09-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghoon Kwon ,  Kihoon Jang

IPC: H01L23/528 ,  H01L23/522 ,  H01L27/07 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40

CPC classification number: H01L23/5283 ,  H01L23/5226 ,  H01L27/0733 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40

Abstract: A semiconductor device includes a first semiconductor structure including circuit elements on a first substrate, a lower interconnection structure connected to the circuit elements, and a peripheral region insulating layer covering the circuit elements; and a second semiconductor structure including a second substrate on the first substrate, a first stack structure including first and second gate electrodes spaced apart from each other and stacked on the second substrate, interlayer insulating layers alternately stacked with the first and second gate electrodes, first and second contact plugs passing through the first and second gate electrodes, and contact plug insulating layers alternately disposed with the interlayer insulating layers and surrounding the contact plugs. The second semiconductor structure includes a first capacitor structure including the first gate electrode, a contact plug insulating layer(s), and the second contact plug, or the second gate electrode, a contact plug insulating layer(s), and the first contact plug.

公开(公告)号：US20230415304A1

公开(公告)日：2023-12-28

申请号：US18210107

申请日：2023-06-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghoon Kwon ,  Boun Yoon

IPC: B24B53/017

CPC classification number: B24B53/017

Abstract: A substrate polishing apparatus includes a polishing pad including a magnetic material, a platen having an upper surface to which the polishing pad is attached, a slurry supply unit installed on the polishing pad, a conditioner installed on the polishing pad to be spaced apart from the slurry supply unit in the one direction and configured to fine-polish a surface of the polishing pad, a polishing head installed on the polishing pad to be spaced apart from the conditioner in the one direction and configured to rotate a polishing target, and a magnetic module installed on the polishing pad to be disposed between the conditioner and the polishing head in the one direction and configured to apply magnetic force to polishing pad debris to remove the polishing pad debris.

公开(公告)号：US20230415303A1

公开(公告)日：2023-12-28

申请号：US18097540

申请日：2023-01-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghoon Kwon ,  Boun Yoon

IPC: B24B53/017 ,  B24B37/24

CPC classification number: B24B53/017 ,  B24B37/24

Abstract: A polishing apparatus for a substrate, includes: a polishing pad having at least one region formed of a light-transmitting material; a platen on which the polishing pad is disposed on an upper surface thereof, having a groove portion in a region overlapping the polishing pad, and rotatably installed in one direction; a light source unit accommodated in the groove portion of the platen, and emitting light of a predetermined wavelength band to the one region of the polishing pad; a slurry supply unit supplying a slurry containing photocatalyst particles excited by the light of the predetermined wavelength band to the polishing pad; and a polishing head installed on the polishing pad to be spaced apart from the slurry supply unit in the one direction, and rotating a semiconductor substrate in close contact with the polishing pad.

公开(公告)号：US11805655B2

公开(公告)日：2023-10-31

申请号：US17324411

申请日：2021-05-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Donghoon Kwon ,  Junsuk Kim ,  Jongheun Lim

IPC: H01L21/00 ,  H10B43/50 ,  H01L23/535 ,  H01L21/768 ,  H10B41/27 ,  H10B41/41 ,  H10B41/50 ,  H10B43/27 ,  H10B43/40

CPC classification number: H10B43/50 ,  H01L21/76805 ,  H01L21/76895 ,  H01L23/535 ,  H10B41/27 ,  H10B41/41 ,  H10B41/50 ,  H10B43/27 ,  H10B43/40

Abstract: A memory device includes a cell stacked structure on a substrate, the cell stacked structure including insulation layers and gate patterns alternately stacked, a channel structure passing through the cell stacked structure, the channel structure extending in a vertical direction, a dummy structure on the substrate, the dummy structure being spaced apart from the cell stacked structure, and the dummy structure including insulation layers and metal patterns alternately stacked, a first through via contact passing through the dummy structure, the first through via contact extending in the vertical direction, and a first capping insulation pattern between a sidewall of the first through via contact and each of the metal patterns in the dummy structure, the first capping insulation pattern insulating the first through via contact from each of the metal patterns.

公开(公告)号：US20230097021A1

公开(公告)日：2023-03-30

申请号：US17828339

申请日：2022-05-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghoon Kwon ,  Chungki Min ,  Kihoon Jang

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L23/48 ,  G11C5/06

Abstract: A semiconductor device includes: a first substrate; a second substrate including first and second regions; a stack structure in the first region and extending from the first region into the second region, the stack structure including interlayer insulating layers and gate layers, wherein the gate layers include gate pads having a step shape in the second region; a capping insulating layer at least partially covering the stack structure; an upper insulating layer on the stack structure and the capping insulating layer; a peripheral contact structure including a plurality of through-vias contacting the second substrate and spaced apart from the gate layers, and a peripheral contact pattern on the plurality of through-vias and connecting at least a portion of the plurality of through-vias to each other; a memory vertical structure; a support vertical structure; and a gate contact plug on the gate pads to be electrically connected to the gate pads.