公开(公告)号：US20220351763A1

公开(公告)日：2022-11-03

申请号：US17536282

申请日：2021-11-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changsik Yoo ,  Hyunah An

IPC: G11C7/22 ,  G11C7/10 ,  G11C5/14

Abstract: A serializer includes data input circuits configured to receive N-number of pieces of data in parallel, where N is an even number, data connection circuits configured to receive internal clock signals having different phases in different arrangements, and data output circuits configured to output the N-number of pieces of data in sequence in a single cycle of each of the internal clock signals, wherein the data connection circuits operate the data output circuits such that the data output circuits, in response to the internal clock signals, output corresponding data of the N-number of pieces of data in an enable period in the single cycle and have a high impedance state in a disable period in the single cycle.

公开(公告)号：US20210342151A1

公开(公告)日：2021-11-04

申请号：US17241159

申请日：2021-04-27

Applicant: SAMSUNG ELECTRONICS CO., LTD

Inventor： KYOUNGHO KIM ,  Changsik Yoo ,  Baekjin Lim

IPC: G06F9/30 ,  G06F1/10 ,  G06F9/38

Abstract: A data transmitting and receiving system includes a first device including an encoder configured to encode row data to generate precoding data and a transmitter configured to transmit the precoding data through a transmission channel and a second device including an integrator configured to perform an integral on the precoding data, an integral sampler including a plurality of samplers configured to output sampling data based on an offset value and an output value of the integrator, a decoder configured to decode outputs of some of the samplers to generate decoded data, and a phase detector configured to detect a phase difference between the precoding data and a clock based on the decoded data and an output of another one of the samplers.