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    Display device
    21.
    发明授权
    Display device 有权
    显示设备

    公开(公告)号：US09395592B2

    公开(公告)日：2016-07-19

    申请号：US14449703

    申请日：2014-08-01

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Young Wan Seo ,  Yeong-Keun Kwon ,  Ji-Sun Kim

    IPC: G02F1/1362 ,  G09G3/36

    CPC classification number: G02F1/136286 ,  G09G3/3611 ,  G09G3/3614 ,  G09G2300/0426 ,  G09G2300/0452 ,  G09G2320/0204

    Abstract: A display device includes pixels, gate lines, and data lines on a substrate. The pixels include sub-pixels, and each sub-pixel includes a respective one of a plurality of first electrodes connected to one of the gate lines and one of the data lines. The first electrode of the sub-pixel at an n-th row and the first electrode of the sub-pixel at an (n+2)-th row in a same column are connected to different ones of the data lines. The sub-pixels in the n-th and (n+2)-th rows in the same column emit the same color of light.

    Abstract translation: 显示装置包括基板上的像素，栅极线和数据线。 像素包括子像素，并且每个子像素包括连接到栅极线之一和数据线之一的多个第一电极中的相应一个。 第n行的子像素的第一电极和同一列中第（n + 2）行的子像素的第一电极连接到不同的数据线。 同一列中第n和第（n + 2）行中的子像素发出相同的光色。

    Display panel
    22.
    发明授权
    Display panel 有权
    显示面板

    公开(公告)号：US09087468B2

    公开(公告)日：2015-07-21

    申请号：US13924221

    申请日：2013-06-21

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Soo-Wan Yoon ,  Yeong-Keun Kwon ,  Ji-Sun Kim ,  Jong Hee Kim ,  Young Wan Seo ,  Jae Keun Lim

    IPC: G09G5/00 ,  G09G3/32 ,  G09G3/36 ,  G11C19/28

    CPC classification number: G09G3/3677 ,  G09G3/3266 ,  G09G3/3696 ,  G09G5/001 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2320/0214 ,  G11C19/28

    Abstract: A display device includes a display area including a gate line and a data line and a gate driver connected to an end of the gate line, the gate driver including at least one stages integrated on a substrate configured to output a gate voltage, in which the stage includes an inverter unit and an output unit, in which the output unit includes a first transistor and a first capacitor. The first transistor includes an input terminal applied with a clock signal, a control terminal connected to the node Q, and an output terminal connected to a gate voltage output terminal through which the gate voltage is output. An inverter voltage output from the inverter is lower than the low voltage of the gate voltage output by the output unit.

    Abstract translation: 显示装置包括包括栅极线和数据线的显示区域和连接到栅极线的端部的栅极驱动器，栅极驱动器包括集成在被配置为输出栅极电压的衬底上的至少一个级，其中， 该级包括逆变器单元和输出单元，其中输出单元包括第一晶体管和第一电容器。 第一晶体管包括施加有时钟信号的输入端子，连接到节点Q的控制端子以及连接到输出栅极电压的栅极电压输出端子的输出端子。 逆变器输出的逆变器电压低于输出单元输出的栅极电压的低电压。

    Display device
    24.
    发明授权
    Display device 有权

    公开(公告)号：US11127805B2

    公开(公告)日：2021-09-21

    申请号：US15994743

    申请日：2018-05-31

    Applicant: Samsung Display Co., Ltd.

    Inventor： Ji-Sun Kim ,  Jang Mi Kang ,  Sun Hwa Lee ,  Mu Kyung Jeon

    IPC: H01L27/32 ,  H01L29/786 ,  H01L27/12 ,  G09G3/3258 ,  G09G3/3233 ,  G09G3/00

    Abstract: A display device includes a substrate, first and second transistors on the substrate, a first electrode connected to one of the first and second transistors, a second electrode facing the first electrode, and a light emission member between the first and second electrodes, where the first transistor includes a first channel including a polycrystalline semiconductor member on the substrate, a first source electrode and a first drain electrode at respective opposite sides of the first channel, a first gate electrode overlapping the first channel, and a first insulating layer covering the first gate electrode, the second transistor includes a second gate electrode on the first insulating layer, a second channel including an oxide semiconductor member on the second gate electrode, second source and drain electrodes on the second channel, and an external light blocking member on the second source and drain electrodes and overlapping the second channel.

    STAGE CIRCUIT AND SCAN DRIVER USING THE SAME
    26.
    发明申请
    STAGE CIRCUIT AND SCAN DRIVER USING THE SAME 有权
    阶段电路和扫描驱动器使用它

    公开(公告)号：US20170061874A1

    公开(公告)日：2017-03-02

    申请号：US15351358

    申请日：2016-11-14

    Applicant: Samsung Display Co., Ltd. ,  Industry-University Cooperation Foundation Hanyang-University

    Inventor： Oh-Kyong Kwon ,  Yeong-Keun Kwon ,  Jong-Hee Kim ,  Ji-Sun Kim ,  Jae-Keun Lim ,  Chong-Chul Chai

    IPC: G09G3/3225

    CPC classification number: G09G3/3225 ,  G09G3/3266 ,  G09G2310/0264 ,  G09G2310/0289 ,  G09G2310/08 ,  G11C19/28

    Abstract: A stage circuit includes a first driver, a second driver, a first output unit, a second output unit and a controller. The first driver controls voltages of first and second nodes, according to a first power source, a third power source, a start signal or a carry signal of a previous stage input to a first input terminal, and a clock signal supplied to a second input terminal. The second driver controls voltages of third and fourth nodes, according to voltages of the first power source, the third power source, the first input terminal and the first and second nodes. The first output unit outputs a carry signal to a first output terminal, according to voltages of the first power source, the second input terminal and the third and fourth nodes. The second output unit outputs a scan signal to a second output terminal, according to voltages of the second power source, the second input terminal and the third and fourth nodes. The controller is electrically coupled to the first output terminal and the second driver.

    Abstract translation: 舞台电路包括第一驱动器，第二驱动器，第一输出单元，第二输出单元和控制器。 第一驱动器根据第一电源，第三电源，开始信号或前一级输入到第一输入端的进位信号来控制第一和第二节点的电压，以及提供给第二输入端的时钟信号 终奌站。 第二驱动器根据第一电源，第三电源，第一输入端和第一和第二节点的电压来控制第三和第四节点的电压。 第一输出单元根据第一电源，第二输入端和第三和第四节点的电压将输入信号输出到第一输出端。 第二输出单元根据第二电源，第二输入端和第三和第四节点的电压向第二输出端输出扫描信号。 控制器电耦合到第一输出端子和第二驱动器。

    DISPLAY DEVICE
    27.
    发明申请
    DISPLAY DEVICE 审中-公开
    显示设备

    公开(公告)号：US20160379566A1

    公开(公告)日：2016-12-29

    申请号：US15157350

    申请日：2016-05-17

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jae Keun Lim ,  Jong Hee Kim ,  Ji-Sun Kim ,  Young Wan Seo ,  Chong Chul Chai

    IPC: G09G3/3258 ,  G09G3/3275

    CPC classification number: G09G3/3283 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/08 ,  G09G2320/0209

    Abstract: There is provided a display device including a display including a first pixel connected to a first data line and a second pixel connected to a second data line, a data signal generator configured to generate an output signal, and a signal divider configured to divide the output signal, to generate a first data signal and a second data signal, and to apply the first data signal and the second data signal to the first data line and the second data line, respectively, wherein the data signal generator is configured to generate the output signal based on a coupling effect of a first parasitic capacitor formed between the first data line and the second data line and a coupling effect of a parasitic capacitor of a data line formed by the first data line and second data line.

    Abstract translation: 提供了一种显示装置，包括：显示器，包括连接到第一数据线的第一像素和连接到第二数据线的第二像素;数据信号发生器，被配置为产生输出信号;以及信号分配器， 信号，以产生第一数据信号和第二数据信号，并且分别将第一数据信号和第二数据信号施加到第一数据线和第二数据线，其中数据信号发生器被配置为产生输出 基于形成在第一数据线和第二数据线之间的第一寄生电容的耦合效应以及由第一数据线和第二数据线形成的数据线的寄生电容的耦合效应的信号。

    Stage circuit and scan driver using the same
    28.
    发明授权
    Stage circuit and scan driver using the same 有权
    舞台电路和扫描驱动器使用相同

    公开(公告)号：US09294086B2

    公开(公告)日：2016-03-22

    申请号：US14456995

    申请日：2014-08-11

    Applicant: Samsung Display Co., Ltd. ,  Industry-University Cooperation Foundation Hanyang-University

    Inventor： Oh-Kyong Kwon ,  Yeong-Keun Kwon ,  Jong-Hee Kim ,  Ji-Sun Kim ,  Jae-Keun Lim ,  Chong-Chul Chai

    IPC: H03K3/00 ,  H03K17/687 ,  G09G3/32 ,  G11C19/18 ,  G11C19/28

    CPC classification number: H03K17/687 ,  G09G3/3266 ,  G09G2310/0286 ,  G09G2310/06 ,  G11C19/184 ,  G11C19/28

    Abstract: A stage circuit includes a first driver, a second driver, a first output unit and a second output unit. The first driver controls voltages of first and second nodes, according to a first power source, a start signal or a carry signal of a previous stage supplied to a first input terminal, a first clock signal supplied to a second input terminal, and a second clock signal supplied to a third input terminal. The second driver controls a voltage of a third node, according to the first power source, a start signal or a carry signal of a previous stage supplied to a first input terminal, a carry signal of a next stage supplied to a fourth input terminal, and the voltage of the second node.

    Abstract translation: 舞台电路包括第一驱动器，第二驱动器，第一输出单元和第二输出单元。 第一驱动器根据第一电源，提供给第一输入端的前一级的起始信号或进位信号，提供给第二输入端的第一时钟信号和第二驱动器控制第一和第二节点的电压， 提供给第三输入端的时钟信号。 第二驱动器根据第一电源控制第三节点的电压，提供给第一输入端的先前级的起始信号或进位信号，提供给第四输入端的下一级的进位信号， 和第二节点的电压。

    GATE DRIVING CIRCUIT AND DISPLAY APPARATUS INCLUDING THE SAME
    29.
    发明申请
    GATE DRIVING CIRCUIT AND DISPLAY APPARATUS INCLUDING THE SAME 有权
    闸门驱动电路和显示装置，包括它们

    公开(公告)号：US20150206490A1

    公开(公告)日：2015-07-23

    申请号：US14461359

    申请日：2014-08-15

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jae-Keun Lim ,  Ji-Sun Kim ,  Kyoung-Ju Shin ,  Chong-Chul Chai ,  Jong-Hee Kim

    IPC: G09G3/36 ,  H03K3/012

    CPC classification number: G09G3/3677 ,  G09G2310/0289 ,  G09G2310/06 ,  G09G2310/08 ,  G09G2320/103 ,  G09G2330/021 ,  G09G2340/0435

    Abstract: A gate driving circuit includes: a pull-up controller applying a carry signal of one of previous stages to a first node in response to the carry signal of the one of the previous stages; a pull-up part outputting a clock signal as an N-th gate output signal; a carry part outputting the clock signal as an N-th carry signal; a first pull-down part pulling down the signal at the first node to a second off voltage; a second pull-down part pulling down the N-th gate output signal to a first off voltage; an inverting part generating an inverting signal based on the clock signal and the second off voltage to output the inverting signal to an inverting node; and a reset part outputting a reset signal to the inverting node.

    Abstract translation: 门驱动电路包括：上拉控制器，响应于前一级之一的进位信号，将先前级之一的进位信号应用于第一节点; 输出时钟信号作为第N栅极输出信号的上拉部分; 输出时钟信号作为第N个进位信号的进位部分; 第一下拉部分，将第一节点处的信号下拉到第二关断电压; 第二下拉部分，将第N栅极输出信号下拉到第一关断电压; 反相部分基于时钟信号和第二截止电压产生反相信号，以将反相信号输出到反相节点; 以及将复位信号输出到反相节点的复位部分。

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