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21.发明申请THIN FILM TRANSISTOR ARRAY SUBSTRATE, ORGANIC LIGHT-EMITTING DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE THIN FILM TRANSISTOR ARRAY SUBSTRATE 有权薄膜晶体管阵列基板，有机发光显示装置及制造薄膜晶体管阵列基板的方法公开(公告)号：US20150123084A1
公开(公告)日：2015-05-07
申请号：US14231263
申请日：2014-03-31
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Jung-Bae Kim , Dong-Kyu Kim , Bo-Yong Chung
IPC: H01L27/32
CPC classification number: H01L27/326 , H01L27/1225 , H01L27/1251 , H01L27/3262 , H01L27/3276
Abstract: A thin film transistor array substrate includes: a substrate; a bottom gate electrode including a gate area doped with ion impurities and undoped areas on left and right sides of the gate area; an active layer on the bottom gate electrode with a first insulating layer therebetween and including a source contact region, a drain contact region, and an oxide semiconductor region; a top gate electrode on the active layer with a second insulating layer therebetween; and a source electrode in contact with the source contact region and a drain electrode in contact with the drain contact region, the source electrode and the drain electrode being on the top gate electrode with a third insulating layer therebetween. The oxide semiconductor region is between the source contact region and the drain contact region.
Abstract translation: 薄膜晶体管阵列基板包括：基板; 底栅电极，其包括掺杂有离子杂质的栅极区域和在栅极区域的左侧和右侧的未掺杂区域; 底栅电极上的有源层，其间具有第一绝缘层，并且包括源极接触区域，漏极接触区域和氧化物半导体区域; 有源层上的顶栅电极，其间具有第二绝缘层; 以及与所述源极接触区域接触的源极电极和与所述漏极接触区域接触的漏极电极，所述源极电极和所述漏极电极位于所述顶部栅极电极上，在其间具有第三绝缘层。 氧化物半导体区域在源极接触区域和漏极接触区域之间。
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公开(公告)号：US10475382B2
公开(公告)日：2019-11-12
申请号：US15893115
申请日：2018-02-09
Applicant: Samsung Display Co., Ltd.
Inventor： Bo-Yong Chung , Dong-Gyu Kim , Hai-Jung In
IPC: G09G3/3241 , G09G3/3291 , G09G3/3233
Abstract: A display device includes a display panel including a first pixel, a second pixel, and a third pixel, a scan driver configure to provide a scan signal to the first through the third pixels, a data driver which provides a data signal to the first through the third pixels, a reference voltage generator which provides a first reference voltage that compensates a degradation of a first driving transistor, a second reference voltage that compensates a degradation of a second driving transistor, and a third reference voltage that compensates a degradation of a third driving transistor, and a timing controller which generates a control signal that controls the scan driver, the data driver, and the reference voltage generator.
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公开(公告)号：US10461144B2
公开(公告)日：2019-10-29
申请号：US16233065
申请日：2018-12-26
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Yong-Jae Kim , Bo-Yong Chung , Hae-Yeon Lee
IPC: H01L27/32 , H01L23/60 , H01L27/12 , H01L27/02 , G09G3/3208 , G02F1/1362 , H01L29/423
Abstract: A static electricity prevention circuit of a display device including: a driving circuit configured to drive a display unit that displays an image, at least one clock signal wire configured to transmit a clock signal to the driving circuit, at least one transistor electrically coupled to the clock signal wire, and at least one capacitor including a first electrode coupled to a source electrode and to a drain electrode of the transistor, and a second electrode configured to be maintained at a voltage.
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公开(公告)号：US09583065B2
公开(公告)日：2017-02-28
申请号：US14692625
申请日：2015-04-21
Applicant: Samsung Display Co., Ltd.
Inventor： Bo-Yong Chung , Chul-Kyu Kang , Hae-Yeon Lee
CPC classification number: G09G3/3677 , G09G3/3266 , G09G2310/0286 , G09G2310/0289 , G09G2310/06 , G09G2310/08 , G11C19/28
Abstract: A gate driver and a display device having the same are disclosed. In one aspect, the gate driver includes a plurality of stages configured to respectively output a plurality of gate output signals. An N-th stage includes a first input circuit configured to boost a first input signal to a first signal and transmit the first input signal to a first node. A second input circuit is configured to boost the first input signal to a second signal and transmit the fifth clock signal and a first direct current (DC) voltage to a second node. A stabilizing circuit is configured to boost a second input signal to a third signal, boost a second node signal to a fourth signal, and stabilize a first node signal. An initializing circuit is configured to initialize voltages at the first and second nodes and the first to fourth signals.
Abstract translation: 公开了一种栅极驱动器和具有该栅极驱动器的显示装置。 在一个方面，栅极驱动器包括被配置为分别输出多个栅极输出信号的多个级。 第N级包括被配置为将第一输入信号升压到第一信号并将第一输入信号发送到第一节点的第一输入电路。 第二输入电路被配置为将第一输入信号升压到第二信号，并将第五时钟信号和第一直流（DC）电压发送到第二节点。 稳定电路被配置为将第二输入信号升压到第三信号，将第二节点信号升压到第四信号，并稳定第一节点信号。 初始化电路被配置为初始化第一和第二节点处的电压以及第一至第四信号。
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公开(公告)号：US09514677B2
公开(公告)日：2016-12-06
申请号：US14041098
申请日：2013-09-30
Applicant: Samsung Display Co., Ltd.
Inventor： Bo-Yong Chung , Hae-Yeon Lee , Yong-Jae Kim
IPC: G09G3/3216 , G09G3/32 , G09G3/00
CPC classification number: G09G3/3233 , G09G3/003 , G09G2300/0819 , G09G2300/0852 , G09G2300/0866 , G09G2310/0216 , G09G2310/063 , G09G2320/043
Abstract: A method of driving an OLED display includes: during a scanning period of a first frame, turning off a relay transistor and turning on a switching transistor to enable a second data voltage applied to a data line to be stored in a first capacitor; and during a light emitting period of the first frame, performing an operation to turn on a light emitting transistor and a compensation transistor to enable a voltage into which a first data voltage and a threshold voltage of a driving transistor are reflected to be applied to a second node for enabling the OLED to emit light by a driving current which flows into a driving transistor. The scanning period and the light emitting period temporally overlap each other.
Abstract translation: 驱动OLED显示器的方法包括：在第一帧的扫描周期期间，关闭继电器晶体管并接通开关晶体管，使施加到数据线的第二数据电压存储在第一电容器中; 并且在第一帧的发光周期期间，执行操作以接通发光晶体管和补偿晶体管，以使第一数据电压和驱动晶体管的阈值电压反映到其中的电压被施加到 第二节点，用于使OLED能够通过流入驱动晶体管的驱动电流发光。 扫描周期和发光周期在时间上彼此重叠。
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Patent Agency Ranking
公开(公告)号：US20160035262A1
公开(公告)日：2016-02-04
申请号：US14597082
申请日：2015-01-14
Applicant: Samsung Display Co., Ltd.
Inventor： Hae-Yeon Lee , Bo-Yong Chung , Na-Young Kim
IPC: G09G3/20
CPC classification number: G11C19/28 , G09G3/3266 , G09G2230/00 , G09G2300/0861 , G09G2310/0205 , G09G2310/0286
Abstract: An emission driver and a display device having the same are disclosed. In one aspect, the emission driver includes a plurality of stages each configured to output an emission control signal, wherein each of the stages includes first and second driving blocks and a buffer block. The buffer block is configured to selectively output an emission control signal so as to operate in a sequential emission mode or in a simultaneous emission mode, the stages being configured to sequentially output a plurality of the emission control signals in the sequential emission mode and substantially simultaneously output the emission control signals in the simultaneous emission mode. The buffer block is further configured to determine a duration in which the emission control signal has a first voltage level based on an interval between time points when first and second intermediate signals have low voltage levels.
Abstract translation: 公开了一种排放驱动器及其显示装置。 在一个方面，发射驱动器包括多个级，每个级被配置为输出发射控制信号，其中每个级包括第一和第二驱动块和缓冲块。 缓冲块被配置为选择性地输出发射控制信号，以便以顺序发射模式或同时发射模式工作，这些级被配置为以顺序发射模式和基本上同时顺序地输出多个发射控制信号 以同时发射模式输出发射控制信号。 缓冲块还被配置为基于当第一和第二中间信号具有低电压电平的时间点之间的间隔来确定发射控制信号具有第一电压电平的持续时间。
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27.发明授权Thin film transistor array substrate, organic light-emitting display apparatus and method of manufacturing the thin film transistor array substrate 有权薄膜晶体管阵列基板，有机发光显示装置及薄膜晶体管阵列基板的制造方法公开(公告)号：US09147719B2
公开(公告)日：2015-09-29
申请号：US14231263
申请日：2014-03-31
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Jung-Bae Kim , Dong-Kyu Kim , Bo-Yong Chung
CPC classification number: H01L27/326 , H01L27/1225 , H01L27/1251 , H01L27/3262 , H01L27/3276
Abstract: A thin film transistor array substrate includes: a substrate; a bottom gate electrode including a gate area doped with ion impurities and undoped areas on left and right sides of the gate area; an active layer on the bottom gate electrode with a first insulating layer therebetween and including a source contact region, a drain contact region, and an oxide semiconductor region; a top gate electrode on the active layer with a second insulating layer therebetween; and a source electrode in contact with the source contact region and a drain electrode in contact with the drain contact region, the source electrode and the drain electrode being on the top gate electrode with a third insulating layer therebetween. The oxide semiconductor region is between the source contact region and the drain contact region.
Abstract translation: 薄膜晶体管阵列基板包括：基板; 底栅电极，其包括掺杂有离子杂质的栅极区域和在栅极区域的左侧和右侧的未掺杂区域; 底栅电极上的有源层，其间具有第一绝缘层，并且包括源极接触区域，漏极接触区域和氧化物半导体区域; 有源层上的顶栅电极，其间具有第二绝缘层; 以及与所述源极接触区域接触的源极电极和与所述漏极接触区域接触的漏极电极，所述源极电极和所述漏极电极位于所述顶部栅极电极上，在其间具有第三绝缘层。 氧化物半导体区域在源极接触区域和漏极接触区域之间。
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28.发明申请CIRCUIT FOR PREVENTING STATIC ELECTRICITY AND DISPLAY DEVICE HAVING THE SAME 有权用于防止静电电路的电路和具有该电路的显示装置公开(公告)号：US20150243726A1
公开(公告)日：2015-08-27
申请号：US14708116
申请日：2015-05-08
Applicant: Samsung Display Co., Ltd.
Inventor： Yong-Jae Kim , Bo-Yong Chung , Hae-Yeon Lee
IPC: H01L27/32
CPC classification number: H01L27/3276 , G02F1/136204 , G02F2202/22 , G09G3/3208 , G09G2330/04 , H01L23/60 , H01L27/0266 , H01L27/027 , H01L27/0296 , H01L27/1214 , H01L27/3262 , H01L27/3265 , H01L29/4232 , H01L2924/0002 , H01L2924/00
Abstract: A static electricity prevention circuit of a display device including: a driving circuit configured to drive a display unit that displays an image, at least one clock signal wire configured to transmit a clock signal to the driving circuit, at least one transistor electrically coupled to the clock signal wire, and at least one capacitor including a first electrode coupled to a source electrode and to a drain electrode of the transistor, and a second electrode configured to be maintained at a voltage.
Abstract translation: 1.一种显示装置的静电防止电路，包括：驱动电路，被配置为驱动显示图像的显示单元;至少一个时钟信号线，被配置为向所述驱动电路发送时钟信号;至少一个晶体管，电耦合到 时钟信号线和至少一个电容器，其包括耦合到晶体管的源电极和漏电极的第一电极，以及被配置为保持在电压的第二电极。
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公开(公告)号：US09117708B2
公开(公告)日：2015-08-25
申请号：US14330859
申请日：2014-07-14
Applicant: Samsung Display Co., Ltd.
Inventor： Jung-Bae Kim , Bo-Yong Chung , Hae-Yeon Lee , Yong-Jae Kim
IPC: H01L29/10 , H01L27/12 , H01L29/786 , H01L21/16 , H01L21/00
CPC classification number: H01L27/1255 , H01L21/00 , H01L21/16 , H01L27/1225 , H01L27/1259 , H01L29/7869 , H01L29/78696
Abstract: A thin film transistor includes a substrate, a gate electrode, a buffer layer, a gate insulating layer, an active layer, an etching stop layer, a source electrode and a drain electrode. The gate electrode is formed on the substrate. The buffer layer partially covers both side portions of the gate electrode. The gate insulating layer covers the gate electrode and the buffer layer. The active layer is formed on the gate insulating layer. The etching stop layer is formed on the active layer, and has a first opening and a second opening on the active layer. The source electrode is formed on the etching stop layer, and contacts with the active layer through the first opening. The drain electrode is formed on the etching stop layer, and is contacted with the active layer through the second opening.
Abstract translation: 薄膜晶体管包括基板，栅电极，缓冲层，栅极绝缘层，有源层，蚀刻停止层，源电极和漏电极。 栅电极形成在基板上。 缓冲层部分地覆盖栅电极的两侧部分。 栅极绝缘层覆盖栅电极和缓冲层。 有源层形成在栅绝缘层上。 蚀刻停止层形成在有源层上，并且在有源层上具有第一开口和第二开口。 源电极形成在蚀刻停止层上，并通过第一开口与有源层接触。 漏电极形成在蚀刻停止层上，并通过第二开口与有源层接触。
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30.发明授权公开(公告)号：US09058770B2
公开(公告)日：2015-06-16
申请号：US13957371
申请日：2013-08-01
Applicant: Samsung Display Co., Ltd.
Inventor： Yong-Jae Kim , Bo-Yong Chung , Hae-Yeon Lee
IPC: G09G3/32 , G02F1/1362 , H01L29/423 , H01L23/60 , H01L27/02 , H01L27/32
CPC classification number: H01L27/3276 , G02F1/136204 , G02F2202/22 , G09G3/3208 , G09G2330/04 , H01L23/60 , H01L27/0266 , H01L27/027 , H01L27/0296 , H01L27/1214 , H01L27/3262 , H01L27/3265 , H01L29/4232 , H01L2924/0002 , H01L2924/00
Abstract: A static electricity prevention circuit of a display device including: a driving circuit configured to drive a display unit that displays an image, at least one clock signal wire configured to transmit a clock signal to the driving circuit, at least one transistor electrically coupled to the dock signal wire, and at least one capacitor including a first electrode coupled to a source electrode and to a drain electrode of the transistor, and a second electrode configured to be maintained at a voltage,
Abstract translation: 1.一种显示装置的静电防止电路，包括：驱动电路，被配置为驱动显示图像的显示单元;至少一个时钟信号线，被配置为向所述驱动电路发送时钟信号;至少一个晶体管，电耦合到 对接信号线，以及包括耦合到晶体管的源电极和漏电极的第一电极的至少一个电容器和被配置为保持在电压的第二电极，
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